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/illumos-gate/usr/src/uts/sun/sys/
H A Dsocal_cq_defs.h38 * define the CQ_HEADER for the soc command queue.
68 #define CQ_TYPE_BYPASS_DEV 0x06 /* supercedes unsolicited in SOC+ */
71 #define CQ_TYPE_ADD_POOL 0x09 /* SOC+ enhancement */
72 #define CQ_TYPE_DELETE_POOL 0x0a /* SOC+ enhancement */
73 #define CQ_TYPE_ADD_BUFFER 0x0b /* SOC+ enhancement */
74 #define CQ_TYPE_ADD_POOL_BUFFER 0x0c /* SOC+ enhancement */
75 #define CQ_TYPE_REQUEST_ABORT 0x0d /* SOC+ enhnacement */
76 #define CQ_TYPE_REQUEST_LIP 0x0e /* SOC+ enhancement */
77 #define CQ_TYPE_REPORT_MAP 0x0f /* SOC+ enhancement */
103 * SOC header definition.
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H A Dsocalvar.h38 * socalvar.h - SOC+ Driver data struct definitions
42 * Define default name and # of SOC+s to allocate to the system
92 * SOC UNIX circular queue descriptor.
141 * SOC+ port status decriptor.
202 * soc to come on line. The timeout in the soc firmware is 10 seconds.
206 #define SOC_INITIAL_ONLINE 30 /* secs for first online from soc */
209 * SOC state structure
214 caddr_t socal_eeprom; /* pointer to soc+ eeprom */
215 caddr_t socal_xrp; /* pointer to soc+ xram */
216 socal_reg_t *socal_rp; /* pointer to soc+ registers */
[all …]
H A Dsocalreg.h38 * SOC+ Register Definitions, Interface Adaptor to Fiber Channel
44 * Define the SOC+ configuration register bits.
91 * Define SOC+ Slave Access Register.
96 uint_t alignment_err:1; /* Soc Alignment Error. */
112 * Define SOC+ Command and Status Register.
118 uint_t socal_to_host:4; /* Soc to host attention. */
120 uint_t host_to_socal:4; /* Host to soc+ attention. */
125 uint_t idle:1; /* SOC+ idle indicator. */
133 * Define SOC+ CSR Register Macros.
158 * Define SOC Interrupt Mask Register Bits.
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H A Dsocalmap.h36 * SOC EEPROM Map
42 #define SOCAL_PROM_SRVC_PARM 0x05304 /* thru 0x00343 SOC+ Service params */
45 #define SOCAL_PROM_SOCAL_CODE 0x06000 /* thru 0x04fff SOC+ code */
49 * SOC XRam Map
59 #define SOCAL_XRAM_UCODE 0x00300 /* thru 0x03fff SOC+ microcode */
64 #define SOCAL_XRAM_BUF_POOL 0x04000 /* thru 0x0bfff soc+ buffer pool */
65 #define SOCAL_XRAM_EXCH_POOL 0x0c000 /* thru 0x0ffff soc+ exchange pool */
H A Dsocalio.h38 * socalio.h - SOC+ Driver user I/O interface dfinitions
/illumos-gate/usr/src/cmd/cmd-inet/usr.sbin/in.routed/
H A Drtquery.c118 int ch, bsize, soc; in main() local
281 soc = socket(PF_INET, SOCK_DGRAM, 0); in main()
282 if (soc < 0) { in main()
288 if (setsockopt(soc, IPPROTO_IP, IP_RECVIF, &on, sizeof (on))) in main()
293 if (setsockopt(soc, SOL_SOCKET, SO_RCVBUF, in main()
303 trace_loop(argv, soc); in main()
305 query_loop(argv, argc, soc); in main()
327 trace_loop(char *argv[], int soc) in trace_loop() argument
341 if (setsockopt(soc, IPPROTO_UDP, UDP_ANONPRIVBIND, in trace_loop()
347 if (bind(soc, (struct sockaddr *)&myaddr, sizeof (myaddr)) < 0) { in trace_loop()
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/illumos-gate/usr/src/uts/common/sys/fc4/
H A Dfc_transport.h82 * SOC status from soc status field in Response que.
84 unsigned int fc_pkt_status; /* SOC Status when complete */
186 * It defines the vectors by which the child obtains soc
267 * unsolicited command received by the soc for this child.
H A Dfcal_transport.h71 uint_t fcal_pkt_status; /* SOC Status when complete */
109 caddr_t fcal_loginparms; /* from soc+ xram */
H A Dfcal.h38 * firmware, SOC assembly code. Please be communicative.
204 * Frame Payloads that the SOC understands
H A Dfc.h38 * firmware, SOC assembly code. Please be communicative.
226 * Frame Payloads that the SOC understands
H A Dfcal_linkapp.h98 * Events supported by soc+ HBA driver
H A Dfcio.h160 uint_t requests; /* requests issued by this soc+ */
/illumos-gate/usr/src/lib/storage/liba5k/common/hdrs/
H A Drom.h58 * - SOC -SOC microcode
82 * SOC_OFF SOC
/illumos-gate/usr/src/uts/sun4u/sunfire/sys/
H A Dfhc.h492 IO_2SBUS_BOARD, /* 2 SBus & SOC IO Board */
493 IO_SBUS_FFB_BOARD, /* SBus & FFB SOC IO Board */
497 IO_2SBUS_SOCPLUS_BOARD, /* 2 SBus & SOC+ IO board */
498 IO_SBUS_FFB_SOCPLUS_BOARD /* SBus&FFB&SOC+ board */
512 #define IO_2SBUS_SOCPLUS_BD_NAME "dual-sbus-soc+"
513 #define IO_SBUS_FFB_SOCPLUS_BD_NAME "upa-sbus-soc+"
537 int soc_compid; /* SOC */
544 int socplus_compid; /* SOC+ */
558 int soc_compid; /* SOC component ID */
566 int socplus_compid; /* or SOC+ component ID */
/illumos-gate/usr/src/lib/cfgadm_plugins/sysctrl/
H A Dsysctrl.xcl28 msgid "soc+sbus "
29 msgid "soc+upa "
/illumos-gate/usr/src/uts/intel/sys/amdzen/
H A Dccd.h35 * L3::SOC This was added starting in Zen 5 and contains several of the
69 * the L3::SOC block.
214 * L3::SOC registers, per-CCD. This functional unit is present starting in Zen
322 * SMU::PWR/L3::SOC registers above or the DF::CoreEnable. The aperture for
H A Dthm.h30 * features that exist within the SOC. Only a subset of the overall thermal
/illumos-gate/usr/src/man/man3cpc/
H A Dcpc.3cpc99 Intel Goldmont SoC events; covers models 5fh and 5ch.
101 Intel Goldmont Plus SoC events; covers model 7ah.
/illumos-gate/usr/src/uts/intel/io/acpica/
H A Dahids.c138 {"INTCFD9", "Intel Baytrail SOC GPIO Controller"},
139 {"INTL9C60", "Intel Baytrail SOC DMA Controller"},
/illumos-gate/usr/src/man/man4d/
H A Dsmntemp.4d32 Each CCD, core complex die, present in the SoC exposes its own temperature in
/illumos-gate/usr/src/uts/sun4u/sunfire/io/
H A Djtag.c120 * of the soc+ versions of the 2-SBus and UPA/SBus boards. Argh...
129 #define IO_TYPE4_LEN 126 /* 2 sysio soc+ */
130 #define IO_TYPE5_LEN 110 /* 1 sysio 1 ffb soc+ */
431 #define SOC_LEN 4 /* SOC is 4 bits */
432 #define SOCPLUS_LEN 8 /* SOC+ is 8 bits */
913 { &chip_soc, 0, 118, 0, 14 }, /* SOC */
930 { &chip_soc, 0, 102, 0, 13 }, /* SOC */
948 { &chip_socplus, 0, 118, 0, 14 }, /* SOC+ */
965 { &chip_socplus, 0, 102, 0, 13 }, /* SOC+ */
/illumos-gate/usr/src/cmd/acpi/common/
H A Dahids.c247 {"INTCFD9", "Intel Baytrail SOC GPIO Controller"},
248 {"INTL9C60", "Intel Baytrail SOC DMA Controller"},
/illumos-gate/usr/src/uts/intel/io/amdzen/
H A Dsmntemp.c101 * SoC supports.
458 * of CCD entries we need to care about per SoC. in smntemp_attach()
/illumos-gate/usr/src/data/hwdata/
H A Dpci.ids7094 8888 Multicore DSP+ARM KeyStone II SOC
16290 0100 88F3700 [Armada 3700 Family] ARM SoC
16291 0110 88F60x0/88F70x0/88F80x0/CN913x ARM SoC
16485 5181 88f5181 [Orion-1] ARM SoC
16486 5182 88f5182 [Orion-NAS] ARM SoC
16487 5281 88f5281 [Orion-2] ARM SoC
16498 6180 88F6180 [Kirkwood] ARM SoC
16499 6192 88F6190/6192 [Kirkwood] ARM SoC
16500 6281 88F6281 [Kirkwood] ARM SoC
16502 6381 MV78xx0 [Discovery Innovation] ARM SoC
[all …]
/illumos-gate/usr/src/uts/common/io/audio/drv/audioemu10k/
H A Daudioemu10k.h216 #define SOC 0x05e /* DW:nocnl */ macro

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