| /freebsd/sys/contrib/device-tree/Bindings/cpu/ |
| H A D | cpu-topology.txt | 2 CPU topology binding description
6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
20 For instance in a system where CPUs support SMT, "cpu" nodes represent all
22 In systems where SMT is not supported "cpu" nodes represent all cores present
25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups
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| /freebsd/sys/contrib/device-tree/src/mips/mobileye/ |
| H A D | eyeq6h.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
8 #include "eyeq6h-fixed-clocks.dtsi"
11 #address-cells = <2>;
12 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 cpu@0 {
17 device_type = "cpu";
28 cpu_intc: interrupt-controller {
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| /freebsd/sys/contrib/device-tree/Bindings/thermal/ |
| H A D | thermal.txt | 15 - thermal sensors: devices which may be used to take temperature
17 - cooling devices: devices which may be used to dissipate heat.
18 - trip points: describe key temperatures at which cooling is recommended. The
20 - cooling maps: used to describe links between trip points and cooling devices;
21 - thermal zones: used to describe thermal data within the hardware;
33 - #thermal-sensor-cells: Used to provide sensor device specific information
46 cooling. A typical passive cooling is a CPU that has dynamic voltage and
56 single unsigned integers, where larger numbers mean greater heat
62 - #cooling-cells: Used to provide cooling device specific information
78 - temperature: An integer indicating the trip temperature level,
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| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | apple,aic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
19 - Level-triggered hardware IRQs wired to SoC blocks
20 - Single mask bit per IRQ
21 - Per-IRQ affinity setting
22 - Automatic masking on event delivery (auto-ack)
23 - Software triggering (ORed with hw line)
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| /freebsd/lib/libkvm/ |
| H A D | kvm_getpcpu.3 | 13 .\" 3. Neither the name of the author nor the names of any co-contributors
36 .Nd access per-CPU data
45 .Fn kvm_dpcpu_setcpu "kvm_t *kd" "u_int cpu"
51 .Fn kvm_getpcpu "kvm_t *kd" "int cpu"
53 .Fn kvm_read_zpcpu "kvm_t *kd" "u_long base" "void *buf" "size_t size" "int cpu"
62 functions are used to access the per-CPU data of active processors in the
65 Per-CPU storage comes in two flavours: data stored directly in a
67 associated with each CPU, and dynamic per-CPU storage (DPCPU), in which a
68 single kernel symbol refers to different data depending on what CPU it is
81 function returns a buffer holding the per-CPU data for a single CPU.
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| /freebsd/sys/contrib/device-tree/Bindings/opp/ |
| H A D | opp.txt | 2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
8 uses CPU as a device.
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
26 cpu@0 {
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
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| H A D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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| /freebsd/sys/contrib/device-tree/src/arm64/hisilicon/ |
| H A D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | hisilicon-hns-nic.txt | 4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
16 In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
17 port-id can be 2 to 7. Here is the diagram:
18 +-----+---------------+
19 | CPU |
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| /freebsd/sys/contrib/device-tree/src/mips/ralink/ |
| H A D | mt7628a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
12 cpu@0 {
14 device_type = "cpu";
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
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| /freebsd/lib/libpmc/pmu-events/ |
| H A D | README | 9 tree tools/perf/pmu-events/arch/foo.
11 - Regular files with '.json' extension in the name are assumed to be
14 - The CSV file that maps a specific CPU to its set of PMU events is to
17 - Directories are traversed, but all other files are ignored.
19 - To reduce JSON event duplication per architecture, platform JSONs may
25 The PMU events supported by a CPU model are expected to grouped into topics
26 such as Pipelining, Cache, Memory, Floating-point etc. All events for a topic
27 should be placed in a separate JSON file - where the file name identifies
28 the topic. Eg: "Floating-point.json".
30 All the topic JSON files for a CPU model/family should be in a separate
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| /freebsd/sys/contrib/device-tree/Bindings/soc/renesas/ |
| H A D | renesas.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas SH-Mobile, R-Mobile, and R-Car Platform
10 - Geert Uytterhoeven <geert+renesas@glider.be>
17 - description: Emma Mobile EV2
19 - enum:
20 - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual
21 - const: renesas,emev2
23 - description: RZ/A1H (R7S72100)
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Trace/intel-pt/ |
| H A D | LibiptDecoder.h | 1 //===-- LibiptDecoder.h --======---------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 #include "forward-declarations.h"
15 #include "intel-pt.h"
39 /// This struct represents a continuous execution of a thread in a cpu,
54 /// Decode a raw Intel PT trace for a single thread given in \p buffer and
64 /// Decode a raw Intel PT trace for a single thread that was collected in a per
65 /// cpu core basis.
76 /// A map from cpu core id to raw intel pt buffers.
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| /freebsd/sys/contrib/device-tree/Bindings/arm/marvell/ |
| H A D | armada-7k-8k.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR X11)
3 ---
4 $id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gregory CLEMENT <gregory.clement@bootlin.com>
18 - description: Armada 7020 SoC
20 - const: marvell,armada7020
21 - const: marvell,armada-ap806-dual
22 - const: marvell,armada-ap806
24 - description: Armada 7040 SoC
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | brcm,dpfe-cpu.txt | 4 DPFE and the DPFE firmware provide an interface for the host CPU to
8 specified in a single reg property.
11 - compatible: must be "brcm,bcm7271-dpfe-cpu", "brcm,bcm7268-dpfe-cpu"
12 or "brcm,dpfe-cpu"
13 - reg: must reference three register ranges
14 - start address and length of the DCPU register space
15 - start address and length of the DCPU data memory space
16 - start address and length of the DCPU instruction memory space
17 - reg-names: must contain "dpfe-cpu", "dpfe-dmem", and "dpfe-imem";
21 dpfe_cpu0: dpfe-cpu@f1132000 {
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| /freebsd/sys/contrib/device-tree/Bindings/csky/ |
| H A D | cpus.txt | 2 C-SKY CPU Bindings
6 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
7 defining properties for every cpu.
9 Only SMP system need to care about the cpus node and single processor
13 cpus and cpu node bindings definition
16 - cpus node
18 Description: Container of cpu nodes
24 - #address-cells
28 - #size-cells
33 - cpu node
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| /freebsd/sys/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,brcmstb.txt | 2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
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| /freebsd/sys/riscv/riscv/ |
| H A D | identcpu.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com>
11 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
51 #include <machine/cpu.h>
69 register_t mvendorid; /* The CPU's JEDEC vendor ID */
75 /* Supervisor-mode extension support. */
84 u_int isa_extensions; /* Single-letter extensions. */
97 * Micro-architecture tables.
104 #define MARCHID_END { -1ul, NULL }
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| /freebsd/sys/contrib/device-tree/Bindings/arm/cpu-enable-method/ |
| H A D | al,alpine-smp | 2 Secondary CPU enable-method "al,alpine-smp" binding
5 This document describes the "al,alpine-smp" method for
6 enabling secondary CPUs. To apply to all CPUs, a single
7 "al,alpine-smp" enable method should be defined in the
10 Enable method name: "al,alpine-smp"
12 Compatible CPUs: "arm,cortex-a15"
17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
20 * Alpine CPU resume registers
22 The CPU resume register are used to define required resume address after
26 - compatible : Should contain "al,alpine-cpu-resume".
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| /freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
| H A D | keystone-k2l.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
20 cpu@0 {
21 compatible = "arm,cortex-a15";
22 device_type = "cpu";
26 cpu@1 {
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| /freebsd/sys/contrib/openzfs/cmd/zpool/zpool.d/ |
| H A D | iostat-10s | 9 iostat-1s: Do a single 1-second iostat sample and show values.
10 iostat-10s: Do a single 10-second iostat sample and show values."
13 if [ "$1" = "-h" ] ; then
14 echo "$helpstr" | grep "$script:" | tr -s '\t' | cut -f 2-
21 if [ ! -b "$VDEV_UPATH" ]; then
27 if [ "$script" = "iostat-1s" ] ; then
28 # Do a single one-second sample
32 elif [ "$script" = "iostat-10s" ] ; then
33 # Do a single ten-second sample
39 if [ -f "$somepath" ] ; then
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| H A D | iostat | 9 iostat-1s: Do a single 1-second iostat sample and show values.
10 iostat-10s: Do a single 10-second iostat sample and show values."
13 if [ "$1" = "-h" ] ; then
14 echo "$helpstr" | grep "$script:" | tr -s '\t' | cut -f 2-
21 if [ ! -b "$VDEV_UPATH" ]; then
27 if [ "$script" = "iostat-1s" ] ; then
28 # Do a single one-second sample
32 elif [ "$script" = "iostat-10s" ] ; then
33 # Do a single ten-second sample
39 if [ -f "$somepath" ] ; then
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| H A D | iostat-1s | 9 iostat-1s: Do a single 1-second iostat sample and show values.
10 iostat-10s: Do a single 10-second iostat sample and show values."
13 if [ "$1" = "-h" ] ; then
14 echo "$helpstr" | grep "$script:" | tr -s '\t' | cut -f 2-
21 if [ ! -b "$VDEV_UPATH" ]; then
27 if [ "$script" = "iostat-1s" ] ; then
28 # Do a single one-second sample
32 elif [ "$script" = "iostat-10s" ] ; then
33 # Do a single ten-second sample
39 if [ -f "$somepath" ] ; then
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap34xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
15 cpu: cpu@0 { label
16 /* OMAP343x/OMAP35xx variants OPP1-6 */
17 operating-points-v2 = <&cpu0_opp_table>;
19 clock-latency = <300000>; /* From legacy driver */
20 #cooling-cells = <2>;
24 cpu0_opp_table: opp-table {
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