| /linux/Documentation/devicetree/bindings/clock/ti/davinci/ |
| H A D | da8xx-cfgchip.txt | 13 - compatible: shall be "ti,da830-usb-phy-clocks".
14 - #clock-cells: from common clock binding; shall be set to 1.
16 - clock-names: shall be "fck", "usb_refclkin", "auxclk"
24 - compatible: shall be "ti,da830-tbclksync".
25 - #clock-cells: from common clock binding; shall be set to 0.
27 - clock-names: shall be "fck"
32 - compatible: shall be "ti,da830-div4p5ena".
33 - #clock-cells: from common clock binding; shall be set to 0.
35 - clock-names: shall be "pll0_pllout"
40 - compatible: shall be "ti,da850-async1-clksrc".
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| H A D | pll.txt | 8 - compatible: shall be one of:
14 - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
15 - for "ti,da850-pll1", shall be "clksrc"
30 - #clock-cells: shall be 0
38 - #clock-cells: shall be 1
45 - #clock-cells: shall be 0
51 - #clock-cells: shall be 0
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| H A D | psc.txt | 7 - compatible: shall be one of:
11 - #clock-cells: from common clock binding; shall be set to 1
12 - #power-domain-cells: from generic power domain binding; shall be set to 1.
15 - for "ti,da850-psc0", shall be "pll0_sysclk1", "pll0_sysclk2",
17 - for "ti,da850-psc1", shall be "pll0_sysclk2", "pll0_sysclk4", "async3"
20 - #reset-cells: from reset binding; shall be set to 1 - only applicable when
25 Clock, power domain and reset consumers shall use the local power domain
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | xgene.txt | 8 - compatible : shall be one of the following:
17 - reg : shall be the physical PLL register address for the pll clock.
18 - clocks : shall be the input parent clock phandle for the clock. This should
20 - #clock-cells : shall be set to 1.
21 - clock-output-names : shall be the name of the PLL referenced by derive
24 - clock-names : shall be the name of the PLL. If missing, use the device name.
27 - reg : shall be the physical register address for the pmd clock.
28 - clocks : shall be the input parent clock phandle for the clock.
29 - #clock-cells : shall be set to 1.
30 - clock-output-names : shall be the name of the clock referenced by derive
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| H A D | vt8500.txt | 8 - compatible : shall be one of the following:
16 - reg : shall be the control register offset from PMC base for the pll clock.
17 - clocks : shall be the input parent clock phandle for the clock. This should
19 - #clock-cells : from common clock binding; shall be set to 0.
22 - clocks : shall be the input parent clock phandle for the clock. This should
24 - #clock-cells : from common clock binding; shall be set to 0.
36 - enable-reg : shall be the register offset from PMC base for the enable
38 - enable-bit : shall be the bit within enable-reg to enable/disable the clock.
44 - divisor-reg : shall be the register offset from PMC base for the divisor
47 - divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
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| H A D | ti,cdce706.txt | 7 - compatible: shall be "ti,cdce706".
8 - reg: i2c device address, shall be in range [0x68...0x6b].
9 - #clock-cells: from common clock binding; shall be set to 1.
11 handles, shall be reference clock(s) connected to CLK_IN0
13 - clock-names: shall be clk_in0 and/or clk_in1. Use clk_in0
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| H A D | microchip,pic32.txt | 10 - compatible: shall be "microchip,pic32mzda-clk".
11 - reg: shall contain base address and length of clock registers.
12 - #clock-cells: shall be 1.
15 - microchip,pic32mzda-sosc: shall be added only if platform has
28 The clock consumer shall specify the desired clock-output of the clock
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| H A D | keystone-pll.txt | 12 - #clock-cells : from common clock binding; shall be set to 0.
13 - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"
41 - #clock-cells : from common clock binding; shall be set to 0.
42 - compatible : shall be "ti,keystone,pll-mux-clock"
63 - #clock-cells : from common clock binding; shall be set to 0.
64 - compatible : shall be "ti,keystone,pll-divider-clock"
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| H A D | lpc1850-cgu.txt | 25 Shall define the base and range of the address space
28 Shall have value <1>. The permitted clock-specifier values
31 Shall contain a list of phandles for the external input
32 sources to the CGU. The list shall be in the following
35 Shall be an ordered list of numbers defining the base clock
38 Shall be an ordered list of strings defining the names of
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | open-pic.txt | 14 shall be <string> and the value shall include "open-pic".
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
20 as an Open PIC. No property value shall be defined.
23 interrupt source. The type shall be a <u32> and the value shall be 2.
26 address. The type shall be <u32> and the value shall be 0. As such,
32 shall not be reset during runtime initialization. No property value shall
34 initialization related to interrupt sources shall be limited to sources
74 // The PIC shall not be reset.
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| H A D | img,pdc-intc.txt | 11 The type shall be <string> and the value shall include "img,pdc-intc".
14 addressable register space. The type shall be <prop-encoded-array>.
17 as an interrupt controller. No property value shall be defined.
20 interrupt source. The type shall be a <u32> and the value shall be 2.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
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| /linux/Documentation/gpu/ |
| H A D | drm-usage-stats.rst | 22 - File shall contain one key value pair per one line of text.
24 - All keys shall be prefixed with `drm-`.
25 - Whitespace between the delimiter and first non-whitespace character shall be
50 String shall contain the name this driver registered as via the respective
70 Uniqueness of the value shall be either globally unique, or unique within the
71 scope of each device, in which case `drm-pdev` shall be present as well.
81 GPUs usually contain multiple execution engines. Each shall be given a stable
85 Value shall be in specified time units which the respective GPU engine spent
97 drm-engine-<keystr> tag and shall contain a greater than zero number in case the
100 In the absence of this tag parser shall assume capacity of one. Zero capacity
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| /linux/Documentation/devicetree/bindings/edac/ |
| H A D | apm-xgene-edac.txt | 14 - compatible : Shall be "apm,xgene-edac".
23 - reg : First resource shall be the CPU bus (PCP) resource.
28 - compatible : Shall be "apm,xgene-edac-mc".
29 - reg : First resource shall be the memory controller unit
34 - compatible : Shall be "apm,xgene-edac-pmd" or
36 - reg : First resource shall be the PMD resource.
40 - compatible : Shall be "apm,xgene-edac-l3" or
42 - reg : First resource shall be the L3 EDAC resource.
45 - compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or
48 - reg : First resource shall be the SoC EDAC resource.
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| /linux/Documentation/devicetree/bindings/perf/ |
| H A D | apm-xgene-pmu.txt | 14 - compatible : Shall be "apm,xgene-pmu" for revision 1 or
19 - reg : First resource shall be the CPU bus PMU resource.
23 - compatible : Shall be "apm,xgene-pmu-l3c".
24 - reg : First resource shall be the L3C PMU resource.
27 - compatible : Shall be "apm,xgene-pmu-iob".
28 - reg : First resource shall be the IOB PMU resource.
31 - compatible : Shall be "apm,xgene-pmu-mcb".
32 - reg : First resource shall be the MCB PMU resource.
36 - compatible : Shall be "apm,xgene-pmu-mc".
37 - reg : First resource shall be the MC PMU resource.
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| /linux/LICENSES/dual/ |
| H A D | Apache-2.0 | 24 "License" shall mean the terms and conditions for use, reproduction, and
27 "Licensor" shall mean the copyright owner or entity authorized by the
30 "Legal Entity" shall mean the union of the acting entity and all other
38 "You" (or "Your") shall mean an individual or Legal Entity exercising
41 "Source" form shall mean the preferred form for making modifications,
45 "Object" form shall mean any form resulting from mechanical transformation
49 "Work" shall mean the work of authorship, whether in Source or Object form,
54 "Derivative Works" shall mean any work, whether in Source or Object form,
58 Derivative Works shall not include works that remain separable from, or
62 "Contribution" shall mean any work of authorship, including the original
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| /linux/Documentation/devicetree/bindings/ata/ |
| H A D | apm-xgene.txt | 7 - compatible : Shall contain:
9 - reg : First memory resource shall be the AHCI memory
11 Second memory resource shall be the host controller
13 Third memory resource shall be the host controller
15 4th memory resource shall be the host controller
17 5th optional memory resource shall be the host
28 - status : Shall be "ok" if enabled or "disabled" if disabled.
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| /linux/tools/testing/selftests/futex/ |
| H A D | README | 6 Functional tests shall test the documented behavior of the futex operation
25 o The build system shall remain as simple as possible, avoiding any archive or
27 o Where possible, any helper functions or other package-wide code shall be
30 o External dependencies shall remain as minimal as possible. Currently gcc
36 Test output shall be easily parsable by both human and machine. Title and
38 sent to stderr. Tests shall support the -c option to print PASS, FAIL, and
39 ERROR strings in color for easy visual parsing. Output shall conform to the
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| /linux/drivers/staging/greybus/Documentation/firmware/ |
| H A D | firmware-management | 12 Interface Manifest shall at least contain the Firmware Management Bundle and a
60 The Firmware Management core creates a device of class 'gb_fw_mgmt', which shall
142 This ioctl shall be used by the user to get the version and firmware-tag of
148 This ioctl shall be used by the user to get the version of a currently
156 This ioctl shall be used by the user to load an Interface Firmware package on
163 This ioctl shall be used by the user to request an Interface to update a
170 This ioctl shall be used by the user to increase the timeout interval within
176 This ioctl shall be used by the user to mode-switch the module to the
198 The Authentication core creates a device of class 'gb_authenticate', which shall
283 This ioctl shall be used by the user to get the endpoint UID associated with
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| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | mpic-msgr.txt | 10 block. The type shall be <string-list> and the value shall be of the form
15 message register block's addressable register space. The type shall be
20 cell is interrupt-number and second cell is level-sense. The type shall be
28 Note that "bit 'n'" is numbered from LSB for PPC hardware. The type shall
38 Numbers shall start at 0.
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| /linux/include/drm/ |
| H A D | drm_bridge.h | 16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
52 * shall not create a drm_connector.
181 * New drivers shall use &drm_bridge_funcs.atomic_disable.
205 * New drivers shall use &drm_bridge_funcs.atomic_post_disable.
232 * New drivers shall set their mode in the
259 * New drivers shall use &drm_bridge_funcs.atomic_pre_enable.
284 * New drivers shall use &drm_bridge_funcs.atomic_enable.
373 * drm_atomic_helper_bridge_duplicate_state() helper function shall be
390 * drm_atomic_helper_bridge_destroy_state() helper function shall be
502 * drm_atomic_helper_bridge_reset() helper function shall be used to
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| /linux/Documentation/firmware-guide/acpi/dsd/ |
| H A D | data-node-references.rst | 17 data extension node which is referred to by the key shall lie directly under
21 The keys in the hierarchical data nodes shall consist of the name of the node,
23 or postfixes). The same ACPI object shall include the _DSD property extension
24 with a property "reg" that shall have the same numerical value as the number of
28 "reg" property shall be omitted from the ACPI object's _DSD properties and the
29 "@" character and the number shall be omitted from the hierarchical data
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| /linux/Documentation/networking/ |
| H A D | oa-tc6-framework.rst | 177 transaction. For TX data chunks, this bit shall be ’1’.
191 RSVD (Bit 28..24) - Reserved: All reserved bits shall be ‘0’.
195 shall set them to ‘0’.
203 SV (Bit 20) - Start Valid flag. The SPI host shall set this bit when the
205 transmit data chunk payload. Otherwise, this bit shall be
209 SWO (Bit 19..16) - Start Word Offset. When SV = 1, this field shall
212 Ethernet frame to be transmitted. The host shall write
215 RSVD (Bit 15) - Reserved: All reserved bits shall be ‘0’.
217 EV (Bit 14) - End Valid flag. The SPI host shall set this bit when the end
219 chunk payload. Otherwise, this bit shall be zero.
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| /linux/Documentation/devicetree/bindings/ |
| H A D | dts-coding-style.rst | 34 3. Unless a bus defines differently, unit addresses shall use lowercase
37 4. Hex values in properties, e.g. "reg", shall use lowercase hex. The address
50 1. Nodes on any bus, thus using unit addresses for children, shall be
56 2. Nodes without unit addresses shall be ordered alpha-numerically by the node
60 3. When extending nodes in the board DTS via &label, the entries shall be
170 shall be enclosed in <>.
185 The DTSI and DTS files shall be organized in a way representing the common,
195 Hardware components that are present on the board shall be placed in the
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | ti-smartreflex.txt | 8 compatible: Shall be one of the following:
15 reg: Shall contain the device instance IO range
17 interrupts: Shall contain the device instance interrupt
22 ti,hwmods: Shall contain the TI interconnect module name if needed
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| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | vidioc-enum-fmt.rst | 39 one until ``EINVAL`` is returned. If applicable, drivers shall return
48 Applications shall initialize the ``mbus_code`` field to zero and drivers
49 shall ignore the value of the field.
51 Drivers shall enumerate all image formats.
61 shall be enumerated.
65 shall restrict enumeration to only the image formats that can produce
68 the driver, then ``EINVAL`` shall be returned.
71 formats shall not depend on the active configuration of the video device
132 ``V4L2_CAP_IO_MC`` :ref:`capability <device-capabilities>`, shall be 0
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