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/linux/drivers/clk/bcm/
H A Dclk-kona.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <linux/clk-provider.h>
24 #define BAD_CLK_NAME ((const char *)-1)
33 #define FLAG_SET(obj, type, flag) ((obj)->flags |= FLAG(type, flag))
34 #define FLAG_CLEAR(obj, type, flag) ((obj)->flags &= ~(FLAG(type, flag)))
35 #define FLAG_FLIP(obj, type, flag) ((obj)->flags ^= FLAG(type, flag))
36 #define FLAG_TEST(obj, type, flag) (!!((obj)->flags & FLAG(type, flag)))
40 #define ccu_policy_exists(ccu_policy) ((ccu_policy)->enable.offset != 0)
44 #define policy_exists(policy) ((policy)->offset != 0)
49 #define gate_is_sw_controllable(gate) FLAG_TEST(gate, GATE, SW)
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/linux/Documentation/networking/device_drivers/wifi/intel/
H A Dipw2200.rst1 .. SPDX-License-Identifier: GPL-2.0
11 - Intel(R) PRO/Wireless 2200BG Network Connection
12 - Intel(R) PRO/Wireless 2915ABG Network Connection
20 Copyright |copy| 2004-2006, Intel Corporation
37 2. Ad-Hoc Networking
78 the warranty and/or issues arising from regulatory non-compliance, and
83 modules, and accordingly, condition system-level regulatory approval
86 non-compliant.
113 -------------------------
116 + BSS mode (Infrastructure, Managed)
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H A Dipw2100.rst1 .. SPDX-License-Identifier: GPL-2.0
10 - Intel(R) PRO/Wireless 2100 Network Connection
12 Copyright |copy| 2003-2006, Intel Corporation
16 :Version: git-1.1.5
23 2. Release git-1.1.5 Current Features
64 the warranty and/or issues arising from regulatory non-compliance, and
69 modules, and accordingly, condition system-level regulatory approval
72 non-compliant.
81 https://www.intel.com/support/wireless/sb/CS-006408.htm
97 2. Release git-1.1.5 Current Supported Features
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/linux/Documentation/security/
H A Dsnp-tdx-threat-model.rst17 the kernel through various networking or limited HW-specific exposed
30 classified into different subtypes depending on the SW that is intended
37 CoCo, in the virtualization context, refers to a set of HW and/or SW
38 technologies that allow for stronger security guarantees for the SW running
40 confirm the trustworthiness of all SW pieces to include in its reduced
48 additional mechanisms to control guest-host page mapping. More details on
49 the x86-specific solutions can be found in
51 …https://www.amd.com/system/files/techdocs/sev-snp-strengthening-vm-isolation-with-integrity-protec…
56 that acts as a security manager. The host-side virtual machine monitor
63 In the following diagram, the "<--->" lines represent bi-directional
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/linux/arch/arm/mach-omap2/
H A Domap_hwmod.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
13 * These headers and macros are used to define OMAP on-chip module
16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * - add interconnect error log structures
21 * - init_conn_id_bit (CONNID_BIT_VECTOR)
22 * - implement default hwmod SMS/SDRC flags?
23 * - move Linux-specific data ("non-ROM data") out
95 /* modulemode control type (SW or HW) */
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/linux/Documentation/userspace-api/
H A Diommufd.rst1 .. SPDX-License-Identifier: GPL-2.0+
20 I/O page tables for all IOMMUs, with room in the design to add non-generic
31 --------------------
35 - IOMMUFD_OBJ_IOAS, representing an I/O address space (IOAS), allowing map/unmap
41 - IOMMUFD_OBJ_DEVICE, representing a device that is bound to iommufd by an
44 - IOMMUFD_OBJ_HWPT_PAGING, representing an actual hardware I/O page table
45 (i.e. a single struct iommu_domain) managed by the iommu driver. "PAGING"
48 feature flag. This can be either an UNMANAGED stage-1 domain for a device
49 running in the user space, or a nesting parent stage-2 domain for mappings
50 from guest-level physical addresses to host-level physical addresses.
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/linux/tools/testing/selftests/net/forwarding/
H A Dbridge_mdb.sh2 # SPDX-License-Identifier: GPL-2.0
4 # +-----------------------+ +------------------------+
15 # +----|------------------+ +----|-------------------+
17 # +----|--------------------------------------------------|-------------------+
18 # | SW | | |
19 # | +--|--------------------------------------------------|-----------------+ |
24 # | +-----------------------------------------------------------------------+ |
25 # +---------------------------------------------------------------------------+
161 check_fail $? "Managed to add $name host entry with a $invalid_state state"
165 check_fail $? "Managed to add $name host entry with a source"
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/linux/drivers/net/ethernet/intel/idpf/
H A Didpf_txrx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
80 * descriptors before SW gets an interrupt and overwrites SW head, the gen bit
82 * be gone forever and SW has no reasonable way to tell that this has happened.
83 * From SW perspective, when we finally get an interrupt, it looks like we're
88 #define IDPF_RX_BUFQ_WORKING_SET(rxq) ((rxq)->desc_count - 1)
92 if (unlikely(++(ntc) == (rxq)->desc_count)) { \
100 if (unlikely(++(idx) == (q)->desc_count)) \
122 ((((txq)->next_to_clean > (txq)->next_to_use) ? 0 : (txq)->desc_count) + \
123 (txq)->next_to_clean - (txq)->next_to_use - 1)
125 #define IDPF_TX_COMPLQ_OVERFLOW_THRESH(txcq) ((txcq)->desc_count >> 1)
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/linux/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/
H A Ddev.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
40 struct mlx5_sf_dev_table *table = dev->priv.sf_dev_table; in mlx5_sf_dev_allocated()
42 return table && !xa_empty(&table->devices); in mlx5_sf_dev_allocated()
50 return sysfs_emit(buf, "%u\n", sf_dev->sfnum); in sfnum_show()
73 mlx5_adev_idx_free(adev->id); in mlx5_sf_dev_release()
82 id = sf_dev->adev.id; in mlx5_sf_dev_remove_aux()
85 auxiliary_device_delete(&sf_dev->adev); in mlx5_sf_dev_remove_aux()
86 auxiliary_device_uninit(&sf_dev->adev); in mlx5_sf_dev_remove_aux()
91 struct mlx5_sf_dev_table *table = dev->priv.sf_dev_table; in mlx5_sf_dev_add()
106 err = -ENOMEM; in mlx5_sf_dev_add()
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/linux/drivers/net/wireless/ath/ath11k/
H A Dhal_desc.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
34 * Producer: SW/FW
43 * Cookie field exclusively used by SW. HW ignores the contents,
47 * Field can be used by SW to for example associate the buffers
510 * Consumer: REO/SW/FW
531 * Indicates the MPDU was received as part of an A-MPDU.
535 * this frame shall be pushed to SW or deleted.
617 * field is still valid for MPDU frames without A-MSDU. It still
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/linux/arch/arm64/kvm/vgic/
H A Dvgic-v4.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/irqchip/arm-gic-v3.h>
18 * The vgic-v4 layer acts as a bridge between several entities:
19 * - The GICv4 ITS representation offered by the ITS driver
20 * - VFIO, which is in charge of the PCI endpoint
21 * - The virtual ITS, which is the only thing the guest sees
46 * - Any invalidation triggers a call to its_prop_update_vlpi()
47 * - The INT command results in a irq_set_irqchip_state(), which
49 * - The CLEAR command results in a irq_set_irqchip_state(), which
51 * - DISCARD translates into an unmap, similar to a call to
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/linux/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
5 * 82562G-2 10/100 Network Connection
7 * 82562GT-2 10/100 Network Connection
9 * 82562V-2 10/100 Network Connection
10 * 82566DC-2 Gigabit Network Connection
12 * 82566DM-2 Gigabit Network Connection
19 * 82567LM-2 Gigabit Network Connection
20 * 82567LF-2 Gigabit Network Connection
21 * 82567V-2 Gigabit Network Connection
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H A Dmac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
9 * e1000e_get_bus_info_pcie - Get PCIe bus information
18 struct pci_dev *pdev = hw->adapter->pdev; in e1000e_get_bus_info_pcie()
19 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
20 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
24 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
27 bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW, in e1000e_get_bus_info_pcie()
31 mac->ops.set_lan_id(hw); in e1000e_get_bus_info_pcie()
37 * e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_dcb_lib.c1 // SPDX-License-Identifier: GPL-2.0
9 * ice_dcb_get_ena_tc - return bitmap of enabled TCs
43 if (vsi->tc_cfg.ena_tc & BIT(i)) in ice_is_pfc_causing_hung_q()
47 for (tc = 0; tc < num_tcs - 1; tc++) in ice_is_pfc_causing_hung_q()
48 if (ice_find_q_in_range(vsi->tc_cfg.tc_info[tc].qoffset, in ice_is_pfc_causing_hung_q()
49 vsi->tc_cfg.tc_info[tc + 1].qoffset, in ice_is_pfc_causing_hung_q()
56 up2tc = rd32(&pf->hw, PRTDCB_TUP2TC); in ice_is_pfc_causing_hung_q()
70 ref_prio_xoff[i] = pf->stats.priority_xoff_rx[i]; in ice_is_pfc_causing_hung_q()
76 if (pf->stats.priority_xoff_rx[i] > ref_prio_xoff[i]) in ice_is_pfc_causing_hung_q()
83 * ice_dcb_get_mode - gets the DCB mode
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/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dfs_chains.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
14 #define chains_lock(chains) ((chains)->lock)
15 #define chains_ht(chains) ((chains)->chains_ht)
16 #define prios_ht(chains) ((chains)->prios_ht)
17 #define chains_default_ft(chains) ((chains)->chains_default_ft)
18 #define chains_end_ft(chains) ((chains)->chains_end_ft)
91 return chains->flags & MLX5_CHAINS_AND_PRIOS_SUPPORTED; in mlx5_chains_prios_supported()
96 return chains->flags & MLX5_CHAINS_IGNORE_FLOW_LEVEL_SUPPORTED; in mlx5_chains_ignore_flow_level_supported()
111 return UINT_MAX - 1; in mlx5_chains_get_chain_range()
127 if (!chains->dev->priv.eswitch || in mlx5_chains_get_prio_range()
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/linux/sound/soc/tegra/
H A Dtegra186_asrc.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION. All rights reserved.
4 // tegra186_asrc.c - Tegra186 ASRC driver
72 regmap_write(asrc->regmap, in tegra186_asrc_lock_stream()
82 regcache_cache_only(asrc->regmap, true); in tegra186_asrc_runtime_suspend()
83 regcache_mark_dirty(asrc->regmap); in tegra186_asrc_runtime_suspend()
93 regcache_cache_only(asrc->regmap, false); in tegra186_asrc_runtime_resume()
100 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_SCRATCH_ADDR, in tegra186_asrc_runtime_resume()
101 asrc->soc_data->aram_start_addr); in tegra186_asrc_runtime_resume()
102 regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_ENB, in tegra186_asrc_runtime_resume()
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/linux/arch/microblaze/include/asm/
H A Dpgtable.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
4 * Copyright (C) 2008-2009 PetaLogix
17 #include <asm-generic/pgtable-nopmd.h>
60 * The MicroBlaze MMU is identical to the PPC-40x MMU, and uses a hash
65 * active mappings. We maintain a two-level page table tree, much
67 * management code. Low-level assembler code in hashtable.S
74 * The MicroBlaze processor has a TLB architecture identical to PPC-40x. The
75 * instruction and data sides share a unified, 64-entry, semi-associative
77 * instruction side has a hardware-managed, 2,4, or 8-entry, fully-associative
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/linux/arch/parisc/kernel/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 1999-2000 Grant Grundler
27 #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
36 ** between ->ack() and ->end() of the interrupt to prevent
37 ** re-interruption of a processing interrupt.
43 unsigned long eirr_bit = EIEM_MASK(d->irq); in cpu_mask_irq()
66 __cpu_unmask_irq(d->irq); in cpu_unmask_irq()
71 unsigned long mask = EIEM_MASK(d->irq); in cpu_ack_irq()
86 unsigned long mask = EIEM_MASK(d->irq); in cpu_eoi_irq()
89 /* set it in the eiems---it's no longer in process */ in cpu_eoi_irq()
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/linux/drivers/phy/samsung/
H A Dphy-exynos5-usbdrd.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <linux/soc/samsung/exynos-regs-pmu.h>
253 /* Exynos9 - GS101 */
387 for (; (tune)->region != PTR_INVALID; ++(tune))
441 * struct exynos5_usbdrd_phy - driver data for USB 3.0 PHY
449 * @hs_phy: pointer to non-Samsung IP high-speed phy controller
456 * @sw: TypeC orientation switch handle
457 * @orientation: TypeC connector orientation - normal or flipped
479 struct typec_switch_dev *sw; member
487 phys[(inst)->index]); in to_usbdrd_phy()
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/linux/drivers/input/misc/
H A Dwistron_btns.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/input/sparse-keymap.h>
25 /* How often we poll keys - msecs */
70 : "=a" (regs->eax), "=b" (regs->ebx), "=c" (regs->ecx) in call_bios()
71 : "0" (regs->eax), "1" (regs->ebx), "2" (regs->ecx), in call_bios()
89 return -1; in locate_wistron_bios()
103 return -ENODEV; in map_bios()
136 return -ENOMEM; in map_bios()
232 keymap = dmi->driver_data; in dmi_matched()
233 for (key = keymap; key->type != KE_END; key++) { in dmi_matched()
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/linux/drivers/pinctrl/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
62 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
77 return pctldev->desc->name; in pinctrl_dev_get_name()
83 return dev_name(pctldev->dev); in pinctrl_dev_get_devname()
89 return pctldev->driver_data; in pinctrl_dev_get_drvdata()
94 * get_pinctrl_dev_from_devname() - look up pin controller device
110 if (!strcmp(dev_name(pctldev->dev), devname)) { in get_pinctrl_dev_from_devname()
129 if (device_match_of_node(pctldev->dev, np)) { in get_pinctrl_dev_from_of_node()
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/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_dcb_nl.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
13 * i40e_get_pfc_delay - retrieve PFC Link Delay
28 * i40e_dcbnl_ieee_getets - retrieve local IEEE ETS configuration
40 if (!(pf->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) in i40e_dcbnl_ieee_getets()
41 return -EINVAL; in i40e_dcbnl_ieee_getets()
43 dcbxcfg = &pf->hw.local_dcbx_config; in i40e_dcbnl_ieee_getets()
44 ets->willing = dcbxcfg->etscfg.willing; in i40e_dcbnl_ieee_getets()
45 ets->ets_cap = I40E_MAX_TRAFFIC_CLASS; in i40e_dcbnl_ieee_getets()
46 ets->cbs = dcbxcfg->etscfg.cbs; in i40e_dcbnl_ieee_getets()
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/linux/include/linux/
H A Dirq.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * Thanks. --rmk
36 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h
38 * IRQ_TYPE_NONE - default, unspecified type
39 * IRQ_TYPE_EDGE_RISING - rising edge triggered
40 * IRQ_TYPE_EDGE_FALLING - falling edge triggered
41 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
42 * IRQ_TYPE_LEVEL_HIGH - high level triggered
43 * IRQ_TYPE_LEVEL_LOW - low level triggered
44 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
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/linux/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/
H A Drx.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2003-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 #include "iwl-prph.h"
12 #include "iwl-io.h"
14 #include "iwl-op-mode.h"
15 #include "pcie/iwl-context-info-v2.h"
37 * to -- the driver can read up to (but not including) this position and get
39 * The READ index is managed by the firmware once the card is enabled.
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/linux/drivers/infiniband/hw/hfi1/
H A Dpio.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright(c) 2015-2018 Intel Corporation.
38 int flush = 0; /* re-read sendctrl to make sure it is flushed */ in pio_send_control()
41 spin_lock_irqsave(&dd->sendctrl_lock, flags); in pio_send_control()
50 for (i = 0; i < ARRAY_SIZE(dd->vld); i++) in pio_send_control()
51 if (!dd->vld[i].mtu) in pio_send_control()
86 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in pio_send_control()
93 #define SCS_POOL_0 -1
94 #define SCS_POOL_1 -2
97 #define SCC_PER_VL -1
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