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/linux/drivers/memory/samsung/
H A Dexynos-srom.c6 // Exynos - SROM Controller support
17 #include "exynos-srom.h"
20 /* SROM side */
29 * struct exynos_srom_reg_dump: register dump of SROM Controller registers.
30 * @offset: srom register offset from the controller base address.
39 * struct exynos_srom: platform data for exynos srom controller driver.
41 * @reg_base: srom base address
67 static int exynos_srom_configure_bank(struct exynos_srom *srom, in exynos_srom_configure_bank() argument
78 if (of_property_read_bool(np, "samsung,srom-page-mode")) in exynos_srom_configure_bank()
80 if (of_property_read_u32_array(np, "samsung,srom-timing", timing, in exynos_srom_configure_bank()
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H A DKconfig25 bool "Exynos SROM controller driver" if COMPILE_TEST
28 This adds driver for Samsung Exynos SoC SROM controller. The driver
29 in basic operation mode only saves and restores SROM registers
H A DMakefile3 obj-$(CONFIG_EXYNOS_SROM) += exynos-srom.o
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410-smdk5410.dts88 srom_ctl: srom-ctl-pins {
95 srom_ebi: srom-ebi-pins {
127 samsung,srom-page-mode;
128 samsung,srom-timing = <9 12 1 9 1 1>;
H A Ds3c6410-smdk6410.dts45 srom-cs1-bus@18000000 {
H A Ds3c6410-mini6410.dts45 srom-cs1-bus@18000000 {
H A Dexynos5.dtsi44 compatible = "samsung,exynos4210-srom";
H A Dexynos4.dtsi104 compatible = "samsung,exynos4210-srom";
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_hal.h125 s8 antgain[2]; /* Ant gain for each band - from SROM */
138 /* Max power board can support (SROM) */
/linux/drivers/mtd/devices/
H A Dpmc551.c12 * cPCI embedded systems. The device contains a single SROM
26 * Due to what I assume is more buggy SROM, the 64M PMC551 I
63 * * Located a bug in the SROM's initialization sequence that
73 * * Add I2C handling of the SROM so we can read the SROM's information
708 * onboard I2C SROM to discover the "real" memory size. in init_pmc551()
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dpub.h170 u8 sromrev; /* version # of the srom */
171 char srom_ccode[BRCM_CNTRY_BUF_SZ]; /* Country Code in SROM */
172 u32 boardflags; /* Board specific flags from srom */
H A Daiutils.c293 /* When Srom support present, fields in sromcontrol */
H A Dchannel.c347 * If no custom world domain is found in the SROM, use the in brcms_c_channel_mgr_attach()
/linux/drivers/net/wireless/broadcom/brcm80211/include/
H A Dchipcommon.h145 /* SROM interface (corerev >= 32) */
253 #define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */
/linux/drivers/net/ethernet/dec/tulip/
H A Deeprom.c21 /* The main routine to parse the very complicated SROM structure.
22 Search www.digital.com for "21X4 SROM" to get details.
96 * srom and can not be handled under the fixup routine. These cards
/linux/arch/arm/mach-s3c/
H A Dmap-s3c64xx.h19 * These may be used by SROM, NAND or CF depending on settings
/linux/drivers/net/ethernet/apple/
H A Dbmac.h43 #define SROMCSR 0x190 /* SROM control */
H A Dbmac.c1023 #define SROMReadCount 3 /* number of words to read from SROM */
/linux/arch/mips/pci/
H A Dpci-bcm63xx.c295 * Backplane bus where access to srom seems very slow */ in bcm63xx_register_pci()
/linux/include/linux/bcma/
H A Dbcma_driver_pci.h96 #define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
/linux/drivers/net/ethernet/davicom/
H A Ddm9000.c505 * Write a word data to SROM
/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dpcie.c2114 /* Map bus window to SROM/OTP shadow area in core */ in brcmf_pcie_read_otp()
/linux/drivers/net/ethernet/tehuti/
H A Dtehuti.c108 pr_info("srom 0x%x fpga %d build %u lane# %d max_pl 0x%x mrrs 0x%x\n", in print_hw_id()