/linux/drivers/misc/ |
H A D | sram.c | 3 * Generic on-chip SRAM allocation driver 21 #include "sram.h" 57 static int sram_add_pool(struct sram_dev *sram, struct sram_reserve *block, in sram_add_pool() argument 62 part->pool = devm_gen_pool_create(sram->dev, ilog2(SRAM_GRANULARITY), in sram_add_pool() 70 dev_err(sram->dev, "failed to register subpool: %d\n", ret); in sram_add_pool() 77 static int sram_add_export(struct sram_dev *sram, struct sram_reserve *block, in sram_add_export() argument 81 part->battr.attr.name = devm_kasprintf(sram->dev, GFP_KERNEL, in sram_add_export() 82 "%llx.sram", in sram_add_export() 92 return device_create_bin_file(sram->dev, &part->battr); in sram_add_export() 95 static int sram_add_partition(struct sram_dev *sram, struct sram_reserve *block, in sram_add_partition() argument [all …]
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H A D | sram-exec.c | 3 * SRAM protect-exec region helper functions 12 #include <linux/sram.h> 17 #include "sram.h" 22 int sram_check_protect_exec(struct sram_dev *sram, struct sram_reserve *block, in sram_check_protect_exec() argument 29 dev_err(sram->dev, in sram_check_protect_exec() 30 "SRAM pool marked with 'protect-exec' is not page aligned and will not be created.\n"); in sram_check_protect_exec() 47 * sram_exec_copy - copy data to a protected executable region of sram 49 * @pool: struct gen_pool retrieved that is part of this sram 57 * This helper function allows sram driver to act as central control location 58 * of 'protect-exec' pools which are normal sram pools but are always set
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/linux/Documentation/devicetree/bindings/sram/ |
H A D | allwinner,sun4i-a10-system-control.yaml | 4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml# 14 The SRAM controller found on most Allwinner devices is represented 15 by a regular node for the SRAM controller itself, with sub-nodes 16 representing the SRAM handled by the SRAM controller. 28 - allwinner,sun4i-a10-sram-controller 29 - allwinner,sun50i-a64-sram-controller 65 "^sram@[a-f0-9]+": 66 $ref: /schemas/sram/sram.yaml# 70 "^sram-section?@[a-f0-9]+$": 79 - const: allwinner,sun4i-a10-sram-a3-a4 [all …]
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/linux/arch/arm/mach-omap1/ |
H A D | sram-init.c | 3 * OMAP SRAM detection and management 22 #include "sram.h" 35 * Memory allocator for SRAM: calculates the new ceiling address 48 pr_err("Not enough space in SRAM\n"); in omap_sram_push_address() 61 void *sram; in omap_sram_push() local 66 sram = omap_sram_push_address(size); in omap_sram_push() 67 if (!sram) in omap_sram_push() 70 base = (unsigned long)sram & PAGE_MASK; in omap_sram_push() 75 dst = fncpy(sram, funcp, size); in omap_sram_push() 83 * The amount of SRAM depends on the core type. [all …]
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/linux/arch/arm/mach-omap2/ |
H A D | sram.c | 4 * OMAP SRAM detection and management 29 #include "sram.h" 57 * Memory allocator for SRAM: calculates the new ceiling address 70 pr_err("Not enough space in SRAM\n"); in omap_sram_push_address() 83 void *sram; in omap_sram_push() local 88 sram = omap_sram_push_address(size); in omap_sram_push() 89 if (!sram) in omap_sram_push() 92 base = (unsigned long)sram & PAGE_MASK; in omap_sram_push() 97 dst = fncpy(sram, funcp, size); in omap_sram_push() 105 * The SRAM context is lost during off-idle and stack [all …]
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/linux/arch/arm/mach-davinci/ |
H A D | sram.h | 3 * mach/sram.h - DaVinci simple SRAM allocator 10 /* ARBITRARY: SRAM allocations are multiples of this 2^N size */ 14 * SRAM allocations return a CPU virtual address, or NULL on error. 15 * If a DMA address is requested and the SRAM supports DMA, its 18 * Errors include SRAM memory not being available, and requesting 19 * DMA mapped SRAM on systems which don't allow that.
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H A D | sram.c | 3 * mach-davinci/sram.c - DaVinci simple SRAM allocator 13 #include "sram.h" 44 * REVISIT This supports CPU and DMA access to/from SRAM, but it 45 * doesn't (yet?) support some other notable uses of SRAM: as TCM
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/linux/drivers/mtd/devices/ |
H A D | ms02-nv.h | 16 * 0x000000 - 0x3fffff SRAM 19 * Within the SRAM area the following ranges are forced by the system 28 * ID value is found, the firmware considers the SRAM clean, i.e. 38 * as well as the size of SRAM available, which can be 1MiB or 2MiB 44 * stored in the SRAM cannot be relied upon. But from the hardware 74 #define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */ 75 #define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */ 76 #define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */ 77 #define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */ 78 #define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */ [all …]
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/linux/Documentation/arch/arm/stm32/ |
H A D | stm32-dma-mdma-chaining.rst | 29 the system SRAM) for different peripheral. It can access external RAMs but 110 STM32 DMA-MDMA chaining feature then uses a SRAM buffer. STM32MP1 SoCs embed 113 bad with DDR, while they are optimal with SRAM. Hence the SRAM buffer used 124 | DMA_SxM0AR |<=>| | SRAM | |<=>| []-[]...[] | 140 **1. Allocate a SRAM buffer** 142 SRAM device tree node is defined in SoC device tree. You can refer to it in 143 your board device tree to define your SRAM pool. 146 &sram { 147 my_foo_device_dma_pool: dma-sram@0 { 152 Be careful of the start index, in case there are other SRAM consumers. [all …]
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/linux/arch/powerpc/platforms/52xx/ |
H A D | mpc52xx_pm.c | 12 extern void mpc52xx_deep_sleep(void __iomem *sram, void __iomem *sdram_regs, 24 static void __iomem *sram; variable 81 mbar = ioremap(res.start, 0xc000); /* we should map whole region including SRAM */ in mpc52xx_pm_prepare() 93 sram = mbar + 0x8000; /* Those will be handled by the */ in mpc52xx_pm_prepare() 134 /* save SRAM */ in mpc52xx_pm_enter() 135 memcpy(saved_sram, sram, sram_size); in mpc52xx_pm_enter() 137 /* copy low level suspend code to sram */ in mpc52xx_pm_enter() 138 memcpy(sram, mpc52xx_ds_sram, mpc52xx_ds_sram_size); in mpc52xx_pm_enter() 144 /* disable all but SDRAM and bestcomm (SRAM) clocks */ in mpc52xx_pm_enter() 162 mpc52xx_deep_sleep(sram, sdram, cdm, intr); in mpc52xx_pm_enter() [all …]
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/linux/drivers/memory/ |
H A D | ti-emif-pm.c | 3 * TI AM33XX SRAM EMIF Driver 17 #include <linux/sram.h> 18 #include <linux/ti-emif-sram.h> 69 emif_data->sram_pool_code = of_gen_pool_get(np, "sram", 0); in ti_emif_alloc_sram() 71 dev_err(dev, "Unable to get sram pool for ocmcram code\n"); in ti_emif_alloc_sram() 88 /* Get sram pool for data section and allocate space */ in ti_emif_alloc_sram() 89 emif_data->sram_pool_data = of_gen_pool_get(np, "sram", 1); in ti_emif_alloc_sram() 91 dev_err(dev, "Unable to get sram pool for ocmcram data\n"); in ti_emif_alloc_sram() 158 dev_err(dev, "Cannot copy emif code to sram\n"); in ti_emif_push_sram() 169 dev_err(dev, "Cannot copy emif data to code sram\n"); in ti_emif_push_sram() [all …]
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/linux/drivers/fsi/ |
H A D | fsi-master-ast-cf.c | 82 /* Amount of SRAM required */ 111 void __iomem *sram; member 315 iowrite32be(op, master->sram + CMD_STAT_REG); in do_copro_command() 328 stat = ioread8(master->sram + CMD_STAT_REG); in do_copro_command() 365 /* Store message into SRAM */ in send_request() 366 iowrite32be((cmd->msg >> 32), master->sram + CMD_DATA); in send_request() 367 iowrite32be((cmd->msg & 0xffffffff), master->sram + CMD_DATA + 4); in send_request() 380 uint8_t rtag = ioread8(master->sram + STAT_RTAG) & 0xf; in read_copro_response() 381 uint8_t rcrc = ioread8(master->sram + STAT_RCRC) & 0xf; in read_copro_response() 392 rdata = ioread32be(master->sram + RSP_DATA); in read_copro_response() [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | marvell-orion-net.txt | 43 - marvell,tx-sram-addr: address of transmit descriptor buffer located in SRAM. 44 - marvell,tx-sram-size: size of transmit descriptor buffer located in SRAM. 46 - marvell,rx-sram-addr: address of receive descriptor buffer located in SRAM. 47 - marvell,rx-sram-size: size of receive descriptor buffer located in SRAM.
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | canaan,k210-sram.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# 7 title: Canaan K210 SRAM memory controller 10 The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB 11 of SRAM. The controller is initialised by the bootloader, which configures 20 - canaan,k210-sram 47 compatible = "canaan,k210-sram";
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | amlogic,meson-mx-ao-arc.yaml | 50 sram: 53 phandles to a reserved SRAM region which is used as the memory of 55 AHB SRAM node as per the generic bindings in 56 Documentation/devicetree/bindings/sram/sram.yaml 70 - sram 83 sram = <&ahb_sram_ao_arc>;
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H A D | ti,k3-dsp-rproc.yaml | 77 sram: 84 phandles to one or more reserved on-chip SRAM regions. The regions 85 should be defined as child nodes of the respective SRAM node, and 87 Documentation/devicetree/bindings/sram/sram.yaml 99 - description: Address and Size of the L2 SRAM internal memory region 118 - description: Address and Size of the L2 SRAM internal memory region 134 - description: Address and Size of the L2 SRAM internal memory region
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/linux/drivers/media/pci/cx25821/ |
H A D | cx25821-sram.h | 12 /* #define RX_SRAM_START_SIZE = 0; // Start of reserved SRAM */ 17 /* #define RX_SRAM_POOL_START_SIZE = 0; // Start of usable RX SRAM for buffers */ 26 /* #define RX_SRAM_POOL_FREE_SIZE = 16; // Start of available RX SRAM */ 27 /* #define RX_SRAM_END_SIZE = 0; // End of RX SRAM */ 29 /* #define TX_SRAM_POOL_START_SIZE = 0; // Start of transmit pool SRAM */ 36 /* #define TX_SRAM_POOL_FREE_SIZE = 704; // Start of available TX SRAM */ 37 /* #define TX_SRAM_END_SIZE = 0; // End of TX SRAM */ 39 /* Receive SRAM */ 167 /* Free Receive SRAM 144 Bytes */ 169 /* Transmit SRAM */
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/linux/drivers/crypto/ccree/ |
H A D | cc_sram_mgr.h | 16 * cc_sram_mgr_init() - Initializes SRAM pool. 17 * The first X bytes of SRAM are reserved for ROM usage, hence, pool 28 * cc_sram_alloc() - Allocate buffer from SRAM pool. 34 * Address offset in SRAM or NULL_SRAM_ADDR for failure. 40 * set values in given array into SRAM. 44 * @dst: The target SRAM buffer to set into
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H A D | cc_sram_mgr.c | 8 * cc_sram_mgr_init() - Initializes SRAM pool. 9 * The pool starts right at the beginning of SRAM. 26 dev_err(dev, "Invalid SRAM offset 0x%x\n", start); in cc_sram_mgr_init() 36 * cc_sram_alloc() - Allocate buffer from SRAM pool. 42 * Address offset in SRAM or NULL_SRAM_ADDR for failure. 68 * set values in given array into SRAM. 72 * @dst: The target SRAM buffer to set into
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | st,stm32-spi.yaml | 30 sram: false 46 sram: false 91 sram: 94 Phandles to a reserved SRAM region which is used as temporary 96 The region should be defined as child node of the AHB SRAM node 97 as per the generic bindings in Documentation/devicetree/bindings/sram/sram.yaml
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/linux/arch/arm/mach-rockchip/ |
H A D | platsmp.c | 121 pr_err("%s: sram or pmu missing for cpu boot\n", __func__); in rockchip_boot_secondary() 146 * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) in rockchip_boot_secondary() 159 * rockchip_smp_prepare_sram - populate necessary sram block 160 * Starting cores execute the code residing at the start of the on-chip sram 161 * after power-on. Therefore make sure, this sram region is reserved and 163 * core to the real startup code in ram into the sram-region. 164 * @node: mmio-sram device node 188 /* set the boot function for the sram code */ in rockchip_smp_prepare_sram() 191 /* copy the trampoline to sram, that runs during startup of the core */ in rockchip_smp_prepare_sram() 263 node = of_find_compatible_node(NULL, NULL, "rockchip,rk3066-smp-sram"); in rockchip_smp_prepare_cpus() [all …]
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/linux/Documentation/devicetree/bindings/arm/omap/ |
H A D | mpu.txt | 14 - sram: Phandle to the ocmcram node 17 - pm-sram: Phandles to ocmcram nodes to be used for power management. 20 data region for code. See Documentation/devicetree/bindings/sram/sram.yaml 52 pm-sram = <&pm_sram_code
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/linux/drivers/remoteproc/ |
H A D | xlnx_r5_remoteproc.c | 60 * struct zynqmp_sram_bank - sram bank description 62 * @sram_res: sram address region information 63 * @da: device address of sram 134 * @sram: Array of sram memories assigned to this core 135 * @num_sram: number of sram for this core 147 struct zynqmp_sram_bank *sram; member 548 struct zynqmp_sram_bank *sram; in add_sram_carveouts() local 554 sram = &r5_core->sram[i]; in add_sram_carveouts() 556 dma_addr = (dma_addr_t)sram->sram_res.start; in add_sram_carveouts() 558 len = resource_size(&sram->sram_res); in add_sram_carveouts() [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | hi6220-clock.txt | 28 - hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram; 29 the driver need use the sram to pass parameters for frequency change. 44 hisilicon,hi6220-clk-sram = <&sram>;
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/linux/arch/arm64/boot/dts/arm/ |
H A D | juno-scmi.dtsi | 200 &sram { 201 /delete-node/ scp-sram@0; 202 /delete-node/ scp-sram@200; 204 cpu_scp_lpri0: scp-sram@0 { 209 cpu_scp_lpri1: scp-sram@80 { 214 cpu_scp_hpri0: scp-sram@100 { 219 cpu_scp_hpri1: scp-sram@180 {
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