Home
last modified time | relevance | path

Searched full:smu (Results 1 – 25 of 181) sorted by relevance

12345678

/linux/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c62 static int smu_force_smuclk_levels(struct smu_context *smu,
65 static int smu_handle_task(struct smu_context *smu,
68 static int smu_reset(struct smu_context *smu);
73 static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);
75 static void smu_power_profile_mode_get(struct smu_context *smu,
77 static void smu_power_profile_mode_put(struct smu_context *smu,
87 struct smu_context *smu = handle; in smu_sys_get_pp_feature_mask() local
89 if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled) in smu_sys_get_pp_feature_mask()
92 return smu_get_pp_feature_mask(smu, buf); in smu_sys_get_pp_feature_mask()
98 struct smu_context *smu = handle; in smu_sys_set_pp_feature_mask() local
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c93 int smu_v13_0_init_microcode(struct smu_context *smu) in smu_v13_0_init_microcode() argument
95 struct amdgpu_device *adev = smu->adev; in smu_v13_0_init_microcode()
102 /* doesn't need to load smu firmware in IOV mode */ in smu_v13_0_init_microcode()
136 void smu_v13_0_fini_microcode(struct smu_context *smu) in smu_v13_0_fini_microcode() argument
138 struct amdgpu_device *adev = smu->adev; in smu_v13_0_fini_microcode()
144 int smu_v13_0_load_microcode(struct smu_context *smu) in smu_v13_0_load_microcode() argument
147 struct amdgpu_device *adev = smu->adev; in smu_v13_0_load_microcode()
186 int smu_v13_0_init_pptable_microcode(struct smu_context *smu) in smu_v13_0_init_pptable_microcode() argument
188 struct amdgpu_device *adev = smu->adev; in smu_v13_0_init_pptable_microcode()
194 /* doesn't need to load smu firmware in IOV mode */ in smu_v13_0_init_pptable_microcode()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c82 static void smu_v11_0_poll_baco_exit(struct smu_context *smu) in smu_v11_0_poll_baco_exit() argument
84 struct amdgpu_device *adev = smu->adev; in smu_v11_0_poll_baco_exit()
93 int smu_v11_0_init_microcode(struct smu_context *smu) in smu_v11_0_init_microcode() argument
95 struct amdgpu_device *adev = smu->adev; in smu_v11_0_init_microcode()
132 void smu_v11_0_fini_microcode(struct smu_context *smu) in smu_v11_0_fini_microcode() argument
134 struct amdgpu_device *adev = smu->adev; in smu_v11_0_fini_microcode()
140 int smu_v11_0_load_microcode(struct smu_context *smu) in smu_v11_0_load_microcode() argument
142 struct amdgpu_device *adev = smu->adev; in smu_v11_0_load_microcode()
180 int smu_v11_0_check_fw_status(struct smu_context *smu) in smu_v11_0_check_fw_status() argument
182 struct amdgpu_device *adev = smu->adev; in smu_v11_0_check_fw_status()
[all …]
/linux/arch/powerpc/include/asm/
H A Dsmu.h6 * Definitions for talking to the SMU chip in newer G5 PowerMacs
14 * Known SMU commands
26 * the SMU. The length is always 2. First byte is the subcommand code
87 * The "RTC" part of the SMU controls the date, time, powerup
112 * the SMU. This is a command of type 0x9a with 9 bytes of header
115 * 0: bus number (from device-tree usually, SMU has lots of busses !)
137 * or if this is an SMU imposed limit. This driver has the same limitation
140 * Once that is completed, a response is expected from the SMU. This is
183 * used to set the voltage slewing point. The SMU replies with "DONE"
248 * frequency) depends on current time. Therefore, the SMU needs to know the
[all …]
/linux/drivers/macintosh/
H A Dwindfarm_smu_controls.c3 * Windfarm PowerMac thermal control. SMU based controls
22 #include <asm/smu.h>
39 * SMU fans control object
47 u32 reg; /* index in SMU */
61 /* Fill SMU command structure */ in smu_set_fan()
64 /* The SMU has an "old" and a "new" way of setting the fan speed in smu_set_fan()
100 printk(KERN_WARNING "windfarm: SMU failed new fan command " in smu_set_fan()
132 *value = fct->value; /* todo: read from SMU */ in smu_fan_get()
176 /* We use the name & location here the same way we do for SMU sensors, in smu_fan_create()
259 struct device_node *smu, *fans, *fan; in smu_controls_init() local
[all …]
H A Dwindfarm_smu_sensors.c3 * Windfarm PowerMac thermal control. SMU based sensors
22 #include <asm/smu.h>
37 * Various SMU "partitions" calibration objects for which we
47 * SMU basic sensors objects
54 u32 reg; /* index in SMU */
270 * SMU Power combo sensor object
411 struct device_node *smu, *sensors, *s; in smu_sensors_init() local
420 smu = of_find_node_by_type(NULL, "smu"); in smu_sensors_init()
421 if (smu == NULL) in smu_sensors_init()
425 for_each_child_of_node(smu, sensors) in smu_sensors_init()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,emev2-smu.yaml4 $id: http://devicetree.org/schemas/clock/renesas,emev2-smu.yaml#
15 This is not a clock provider, but clocks under SMU depend on it.
19 const: renesas,emev2-smu
49 const: renesas,emev2-smu-clkdiv
54 Byte offset from SMU base and Bit position in the register.
81 const: renesas,emev2-smu-gclk
86 Byte offset from SMU base and Bit position in the register.
111 compatible = "renesas,emev2-smu";
129 compatible = "renesas,emev2-smu-clkdiv";
135 compatible = "renesas,emev2-smu-gclk";
/linux/arch/arm/boot/dts/renesas/
H A Demev2.dtsi61 compatible = "renesas,emev2-smu";
72 compatible = "renesas,emev2-smu-clkdiv";
78 compatible = "renesas,emev2-smu-gclk";
84 compatible = "renesas,emev2-smu-clkdiv";
90 compatible = "renesas,emev2-smu-gclk";
103 compatible = "renesas,emev2-smu-clkdiv";
109 compatible = "renesas,emev2-smu-clkdiv";
115 compatible = "renesas,emev2-smu-clkdiv";
121 compatible = "renesas,emev2-smu-clkdiv";
127 compatible = "renesas,emev2-smu-gclk";
[all …]
/linux/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c125 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_set_gfx_power_up_by_imu() local
129 ret = smu_set_gfx_power_up_by_imu(smu); in amdgpu_dpm_set_gfx_power_up_by_imu()
182 /* VF lost access to SMU */ in amdgpu_dpm_set_mp1_state()
289 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_is_mode1_reset_supported() local
294 support_mode1_reset = smu_mode1_reset_is_support(smu); in amdgpu_dpm_is_mode1_reset_supported()
303 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_mode1_reset() local
308 ret = smu_mode1_reset(smu); in amdgpu_dpm_mode1_reset()
317 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_is_link_reset_supported() local
322 support_link_reset = smu_link_reset_is_support(smu); in amdgpu_dpm_is_link_reset_supported()
331 struct smu_context *smu = adev->powerplay.pp_handle; in amdgpu_dpm_link_reset() local
[all …]
/linux/arch/arm/mach-shmobile/
H A Dsmp-emev2.c32 void __iomem *smu; in emev2_smp_prepare_cpus() local
35 smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE); in emev2_smp_prepare_cpus()
36 if (smu) { in emev2_smp_prepare_cpus()
37 iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0); in emev2_smp_prepare_cpus()
38 iounmap(smu); in emev2_smp_prepare_cpus()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu11_driver_if_navi10.h27 // SMU TEAM: Always increment the interface version if
320 uint32_t MmHubPadding[8]; // SMU internal use
561 …uint8_t GceaLinkMgrIdleThreshold; //Set by SMU FW during enablment of SOC_ULV. Controls d…
733 …uint16_t MaxVoltageStepGfx; // In mV(Q2) Max voltage step that SMU will request. Multiple step…
734 …uint16_t MaxVoltageStepSoc; // In mV(Q2) Max voltage step that SMU will request. Multiple step…
815 uint32_t MmHubPadding[8]; // SMU internal use
830 uint32_t MmHubPadding[8]; // SMU internal use
856 uint32_t MmHubPadding[6]; // SMU internal use
890 uint32_t MmHubPadding[8]; // SMU internal use
929 uint32_t MmHubPadding[8]; // SMU internal use
[all …]
H A Dsmu11_driver_if_arcturus.h28 // SMU TEAM: Always increment the interface version if
316 uint32_t MmHubPadding[8]; // SMU internal use
647 …uint16_t MaxVoltageStepGfx; // In mV(Q2) Max voltage step that SMU will request. Multiple step…
648 …uint16_t MaxVoltageStepSoc; // In mV(Q2) Max voltage step that SMU will request. Multiple step…
734 uint32_t MmHubPadding[8]; // SMU internal use
753 uint32_t MmHubPadding[8]; // SMU internal use
785 uint32_t MmHubPadding[8]; // SMU internal use
795 uint32_t MmHubPadding[8]; // SMU internal use
846 uint32_t MmHubPadding[8]; // SMU internal use
893 uint32_t MmHubPadding[8]; // SMU internal use
H A Dsmu11_driver_if_sienna_cichlid.h28 // SMU TEAM: Always increment the interface version if
405 uint32_t MmHubPadding[8]; // SMU internal use
655 …uint8_t GceaLinkMgrIdleThreshold; //Set by SMU FW during enablment of GFXOFF. Controls de…
736 …min amount of time power credit accumulator should have a value > 0 before SMU exits the DCS throt…
737 …uint16_t DcsTimeout; //This is the amount of time SMU FW waits for RLC to put GFX…
958 uint32_t MmHubPadding[8]; // SMU internal use
1015 …uint8_t GceaLinkMgrIdleThreshold; //Set by SMU FW during enablment of GFXOFF. Controls de…
1096 …min amount of time power credit accumulator should have a value > 0 before SMU exits the DCS throt…
1097 …uint16_t DcsTimeout; //This is the amount of time SMU FW waits for RLC to put GFX…
1319 uint32_t MmHubPadding[8]; // SMU internal use
[all …]
/linux/drivers/platform/x86/amd/pmc/
H A Dpmc.h17 /* SMU communication registers */
31 /* Base address of SMU for mapping physical address to virtual address */
39 /* SMU Response Codes */
55 /* SMU Message Definations */
105 /* SMU version information */
H A Dpmc.c138 dev_warn_once(dev->dev, "SMU debugging info not supported on this platform\n"); in amd_pmc_setup_smu_logging()
142 /* Get Active devices list from SMU */ in amd_pmc_setup_smu_logging()
216 dev_dbg(dev->dev, "SMU program %u version is %u.%u.%u\n", in amd_pmc_get_smu_version()
288 seq_puts(s, "\n=== SMU Statistics ===\n"); in smu_fw_info_show()
352 /* we haven't yet read SMU version */ in amd_pmc_idlemask_read()
377 pm_pr_dbg("SMU idlemask s0i3: 0x%x\n", val); in amd_pmc_idlemask_read()
380 seq_printf(s, "SMU idlemask : 0x%x\n", val); in amd_pmc_idlemask_read()
465 dev_err(dev->dev, "failed to talk to SMU\n"); in amd_pmc_send_cmd()
483 dev_err(dev->dev, "SMU response timed out\n"); in amd_pmc_send_cmd()
496 dev_err(dev->dev, "SMU not ready. err: 0x%x\n", val); in amd_pmc_send_cmd()
[all …]
/linux/drivers/clk/renesas/
H A Dclk-emev2.c13 /* EMEV2 SMU registers */
35 { .compatible = "renesas,emev2-smu", },
78 CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv",
95 CLK_OF_DECLARE(emev2_smu_gclk, "renesas,emev2-smu-gclk", emev2_smu_gclk_init);
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu9_driver_if.h30 * SMU TEAM: Always increment the interface version if
173 …uint8_t MaxVidStep; /* Max VID step that SMU will request. Multiple steps are taken if voltag…
324 uint32_t MmHubPadding[3]; /* SMU internal use */
351 uint32_t MmHubPadding[7]; /* SMU internal use */
362 uint32_t MmHubPadding[7]; /* SMU internal use */
372 uint32_t MmHubPadding[7]; /* SMU internal use */
382 uint32_t MmHubPadding[7]; /* SMU internal use */
424 uint32_t MmHubPadding[7]; /* SMU internal use */
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.c112 smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result); in dcn31_smu_send_msg_with_param()
121 /* Set the parameter register for the SMU message, unit is Mhz */ in dcn31_smu_send_msg_with_param()
132 DC_LOG_DEBUG("Watermarks table not configured properly by SMU"); in dcn31_smu_send_msg_with_param()
163 /* Unit of SMU msg parameter is Mhz */ in dcn31_smu_set_dispclk()
248 //TODO: Work with smu team to define optimization options. in dcn31_smu_set_display_idle_optimization()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.c107 smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result); in dcn301_smu_send_msg_with_param()
116 /* Set the parameter register for the SMU message, unit is Mhz */ in dcn301_smu_send_msg_with_param()
151 /* Unit of SMU msg parameter is Mhz */ in dcn301_smu_set_dispclk()
220 //TODO: Work with smu team to define optimization options. in dcn301_smu_set_display_idle_optimization()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c128 smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", in dcn314_smu_send_msg_with_param()
137 /* Set the parameter register for the SMU message, unit is Mhz */ in dcn314_smu_send_msg_with_param()
148 DC_LOG_DEBUG("Watermarks table not configured properly by SMU"); in dcn314_smu_send_msg_with_param()
182 /* Unit of SMU msg parameter is Mhz */ in dcn314_smu_set_dispclk()
267 //TODO: Work with smu team to define optimization options. in dcn314_smu_set_display_idle_optimization()
/linux/drivers/platform/x86/amd/pmf/
H A Dcore.c20 /* PMF-SMU communication registers */
25 /* Base address of SMU for mapping physical address to virtual address */
33 /* SMU Response Codes */
205 dev_err(dev->dev, "failed to talk to SMU\n"); in amd_pmf_send_cmd()
223 dev_err(dev->dev, "SMU response timed out\n"); in amd_pmf_send_cmd()
236 dev_err(dev->dev, "SMU not ready. err: 0x%x\n", val); in amd_pmf_send_cmd()
240 dev_err(dev->dev, "SMU cmd unknown. err: 0x%x\n", val); in amd_pmf_send_cmd()
246 dev_err(dev->dev, "SMU cmd failed. err: 0x%x\n", val); in amd_pmf_send_cmd()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h30 * interface to PPLIB/SMU to setup clocks and pstate requirements on SoC
154 // voltage managed SMU, freq set by driver
161 // freq/voltage managed by SMU
221 /* Not a single SMU message. This call should return maximum sustainable limit for all
232 /* Not a single SMU message. This call informs PPLIB that display will not be able
/linux/Documentation/devicetree/bindings/pci/
H A Dtoshiba,visconti-pcie.yaml27 - description: Visconti specific SMU registers
35 - const: smu
86 reg-names = "dbi", "config", "ulreg", "smu", "mpu";
/linux/Documentation/ABI/testing/
H A Dsysfs-amd-pmc5 System Management Unit (SMU) contained in AMD CPUs and
11 Description: Reading this file reports the program corresponding to the SMU
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.c127 smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result); in dcn316_smu_send_msg_with_param()
136 /* Set the parameter register for the SMU message, unit is Mhz */ in dcn316_smu_send_msg_with_param()
168 /* Unit of SMU msg parameter is Mhz */ in dcn316_smu_set_dispclk()
236 //TODO: Work with smu team to define optimization options. in dcn316_smu_set_display_idle_optimization()

12345678