xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml (revision 0d5ec7919f3747193f051036b2301734a4b5e1d6) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2025 Analog Devices Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/iio/adc/adi,ad4080.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Analog Devices AD4080 20-Bit, 40 MSPS, Differential SAR ADC
9
10maintainers:
11  - Antoniu Miclaus <antoniu.miclaus@analog.com>
12
13description: |
14  The AD4080 is a high speed, low noise, low distortion, 20-bit, Easy Drive,
15  successive approximation register (SAR) analog-to-digital converter (ADC).
16  Maintaining high performance (signal-to-noise and distortion (SINAD) ratio
17  > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to
18  service a wide variety of precision, wide bandwidth data acquisition
19  applications.
20
21  https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
22
23$ref: /schemas/spi/spi-peripheral-props.yaml#
24
25properties:
26  compatible:
27    enum:
28      - adi,ad4080
29
30  reg:
31    maxItems: 1
32
33  spi-max-frequency:
34    description: Configuration of the SPI bus.
35    maximum: 50000000
36
37  clocks:
38    maxItems: 1
39
40  clock-names:
41    items:
42      - const: cnv
43
44  vdd33-supply: true
45
46  vdd11-supply: true
47
48  vddldo-supply: true
49
50  iovdd-supply: true
51
52  vrefin-supply: true
53
54  io-backends:
55    maxItems: 1
56
57  adi,lvds-cnv-enable:
58    description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
59    type: boolean
60
61  adi,num-lanes:
62    description:
63      Number of lanes on which the data is sent on the output (DA, DB pins).
64    $ref: /schemas/types.yaml#/definitions/uint32
65    enum: [1, 2]
66    default: 1
67
68required:
69  - compatible
70  - reg
71  - clocks
72  - clock-names
73  - vdd33-supply
74  - vrefin-supply
75
76additionalProperties: false
77
78examples:
79  - |
80    spi {
81        #address-cells = <1>;
82        #size-cells = <0>;
83
84        adc@0 {
85          compatible = "adi,ad4080";
86          reg = <0>;
87          spi-max-frequency = <10000000>;
88          vdd33-supply = <&vdd33>;
89          vddldo-supply = <&vddldo>;
90          vrefin-supply = <&vrefin>;
91          clocks = <&cnv>;
92          clock-names = "cnv";
93          io-backends = <&iio_backend>;
94        };
95    };
96...
97