/linux/drivers/gpu/drm/ci/xfails/ |
H A D | msm-sdm845-flakes.txt | 1 # Board Name: sdm845-cheza-r3 8 # Board Name: sdm845-cheza-r3 15 # Board Name: sdm845-cheza-r3 22 # Board Name: sdm845-cheza-r3 29 # Board Name: sdm845-cheza-r3 36 # Board Name: sdm845-cheza-r3 43 # Board Name: sdm845-cheza-r3 50 # Board Name: sdm845-cheza-r3 57 # Board Name: sdm845-cheza-r3 64 # Board Name: sdm845-cheza-r3 [all …]
|
/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm845-lg-judyp.dts | 3 * SDM845 LG V35 (judyp) device tree. 10 #include "sdm845-lg-common.dtsi" 14 compatible = "lg,judyp", "qcom,sdm845"; 29 firmware-name = "qcom/sdm845/judyp/adsp.mbn"; 33 firmware-name = "qcom/sdm845/judyp/cdsp.mbn"; 38 firmware-name = "qcom/sdm845/judyp/a630_zap.mbn"; 43 firmware-name = "qcom/sdm845/judyp/mba.mbn", "qcom/sdm845/judyp/modem.mbn";
|
H A D | sdm845-lg-judyln.dts | 3 * SDM845 LG G7 (judyln) device tree. 10 #include "sdm845-lg-common.dtsi" 14 compatible = "lg,judyln", "qcom,sdm845"; 43 firmware-name = "qcom/sdm845/judyln/adsp.mbn"; 47 firmware-name = "qcom/sdm845/judyln/cdsp.mbn"; 52 firmware-name = "qcom/sdm845/judyln/a630_zap.mbn"; 57 firmware-name = "qcom/sdm845/judyln/mba.mbn", "qcom/sdm845/judyln/modem.mbn";
|
H A D | Makefile | 206 dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb 207 dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb 208 dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb 209 dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb 210 dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb 211 dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb 212 dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb 213 dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb 214 dtb-$(CONFIG_ARCH_QCOM) += sdm845-oneplus-enchilada.dtb 215 dtb-$(CONFIG_ARCH_QCOM) += sdm845-oneplus-fajita.dtb [all …]
|
H A D | sdm845-xiaomi-beryllium-common.dtsi | 10 #include "sdm845.dtsi" 11 #include "sdm845-wcd9340.dtsi" 16 * Delete following upstream (sdm845.dtsi) reserved 138 firmware-name = "qcom/sdm845/beryllium/adsp.mbn"; 231 firmware-name = "qcom/sdm845/beryllium/cdsp.mbn"; 251 firmware-name = "qcom/sdm845/beryllium/a630_zap.mbn"; 311 firmware-name = "qcom/sdm845/beryllium/mba.mbn", "qcom/sdm845/beryllium/modem.mbn"; 317 firmware-name = "qcom/sdm845/beryllium/ipa_fws.mbn"; 425 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard"; 580 firmware-name = "qcom/sdm845/beryllium/venus.mbn";
|
H A D | sdm845-cheza-r2.dts | 10 #include "sdm845-cheza.dtsi" 14 compatible = "google,cheza-rev2", "qcom,sdm845"; 17 * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children 52 /* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */ 82 * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label
|
H A D | sdm845-cheza-r1.dts | 10 #include "sdm845-cheza.dtsi" 14 compatible = "google,cheza-rev1", "qcom,sdm845"; 17 * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children 52 /* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */ 82 * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label
|
H A D | sdm845.dtsi | 3 * SDM845 SoC device tree source 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 14 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 20 #include <dt-bindings/interconnect/qcom,sdm845.h> 25 #include <dt-bindings/reset/qcom,sdm845-aoss.h> 26 #include <dt-bindings/reset/qcom,sdm845-pdc.h> [all …]
|
/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,rpmh.yaml | 58 - qcom,sdm845-aggre1-noc 59 - qcom,sdm845-aggre2-noc 60 - qcom,sdm845-config-noc 61 - qcom,sdm845-dc-noc 62 - qcom,sdm845-gladiator-noc 63 - qcom,sdm845-mem-noc 64 - qcom,sdm845-mmss-noc 65 - qcom,sdm845-system-noc 130 #include <dt-bindings/interconnect/qcom,sdm845.h> 133 compatible = "qcom,sdm845-mem-noc"; [all …]
|
H A D | qcom,msm8998-bwmon.yaml | 16 Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845:: 33 - qcom,sdm845-cpu-bwmon 40 - const: qcom,sdm845-bwmon # BWMON v4, unified register space 53 - const: qcom,sdm845-llcc-bwmon # BWMON v5 108 #include <dt-bindings/interconnect/qcom,sdm845.h> 112 compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
|
/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | qcom,sdm845-mdss.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml# 7 title: Qualcomm SDM845 Display MDSS 15 bindings of MDSS are mentioned for SDM845 target. 21 const: qcom,sdm845-mdss 49 const: qcom,sdm845-dpu 57 const: qcom,sdm845-dp 66 - const: qcom,sdm845-dsi-ctrl 84 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 85 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 93 compatible = "qcom,sdm845-mdss"; [all …]
|
H A D | qcom,sdm845-dpu.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml# 7 title: Qualcomm Display DPU on SDM845 18 - qcom,sdm845-dpu 57 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 58 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 62 compatible = "qcom,sdm845-dpu";
|
/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,sdm845-dispcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-dispcc.yaml# 7 title: Qualcomm Display Clock & Reset Controller on SDM845 14 domains on SDM845. 16 See also:: include/dt-bindings/clock/qcom,dispcc-sdm845.h 20 const: qcom,sdm845-dispcc 22 # NOTE: sdm845.dtsi existed for quite some time and specified no clocks. 62 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 65 compatible = "qcom,sdm845-dispcc";
|
H A D | qcom,gcc-sdm845.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml# 7 title: Qualcomm Global Clock & Reset Controller on SDM670 and SDM845 15 domains on SDM670 and SDM845 17 See also:: include/dt-bindings/clock/qcom,gcc-sdm845.h 23 - qcom,gcc-sdm845 64 const: qcom,gcc-sdm845 85 # Example for GCC for SDM845: 89 compatible = "qcom,gcc-sdm845";
|
H A D | qcom,sdm845-lpasscc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-lpasscc.yaml# 7 title: Qualcomm SDM845 LPASS Clock Controller 13 Qualcomm SDM845 LPASS (Low Power Audio SubSystem) Clock Controller. 15 See also:: include/dt-bindings/clock/qcom,lpass-sdm845.h 19 const: qcom,sdm845-lpasscc 43 compatible = "qcom,sdm845-lpasscc";
|
H A D | qcom,sdm845-camcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-camcc.yaml# 7 title: Qualcomm Camera Clock & Reset Controller on SDM845 14 domains on SDM845. 23 const: qcom,sdm845-camcc 47 compatible = "qcom,sdm845-camcc";
|
H A D | qcom,gpucc.yaml | 17 include/dt-bindings/clock/qcom,gpucc-sdm845.h 30 - qcom,sdm845-gpucc 78 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 81 compatible = "qcom,sdm845-gpucc";
|
H A D | qcom,videocc.yaml | 19 include/dt-bindings/clock/qcom,videocc-sdm845.h 28 - qcom,sdm845-videocc 64 - qcom,sdm845-videocc 131 compatible = "qcom,sdm845-videocc";
|
/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,adsp.yaml | 27 - qcom,sdm845-adsp-pas 28 - qcom,sdm845-cdsp-pas 29 - qcom,sdm845-slpi-pas 72 - qcom,sdm845-adsp-pas 73 - qcom,sdm845-cdsp-pas 74 - qcom,sdm845-slpi-pas 96 - qcom,sdm845-adsp-pas 97 - qcom,sdm845-cdsp-pas 98 - qcom,sdm845-slpi-pas 156 - qcom,sdm845-slpi-pas
|
/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | qcom,sdm845-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdm845-pinctrl.yaml# 7 title: Qualcomm SDM845 TLMM pin controller 14 Top Level Mode Multiplexer pin controller in Qualcomm SDM845 SoC. 21 const: qcom,sdm845-pinctrl 39 - $ref: "#/$defs/qcom-sdm845-tlmm-state" 42 $ref: "#/$defs/qcom-sdm845-tlmm-state" 51 qcom-sdm845-tlmm-state: 114 compatible = "qcom,sdm845-pinctrl";
|
/linux/Documentation/devicetree/bindings/reset/ |
H A D | qcom,aoss-reset.yaml | 22 - const: qcom,sdm845-aoss-cc 27 - const: qcom,sdm845-aoss-cc 29 - description: on SDM845 SoCs the following compatibles must be specified 31 - const: qcom,sdm845-aoss-cc 49 compatible = "qcom,sdm845-aoss-cc";
|
H A D | qcom,pdc-global.yaml | 22 - const: qcom,sdm845-pdc-global 28 - description: on SDM845 SoCs the following compatibles must be specified 30 - const: qcom,sdm845-pdc-global 48 compatible = "qcom,sdm845-pdc-global";
|
/linux/Documentation/devicetree/bindings/media/ |
H A D | qcom,sdm845-venus.yaml | 4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml# 7 title: Qualcomm SDM845 Venus video encode and decode accelerators 21 const: qcom,sdm845-venus 101 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 104 compatible = "qcom,sdm845-venus";
|
H A D | qcom,sdm845-venus-v2.yaml | 4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml# 7 title: Qualcomm SDM845 Venus v2 video encode and decode accelerators 21 const: qcom,sdm845-venus-v2 99 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 102 compatible = "qcom,sdm845-venus-v2";
|
/linux/Documentation/devicetree/bindings/iommu/ |
H A D | qcom,tbu.yaml | 22 - qcom,sdm845-tbu 56 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 58 #include <dt-bindings/interconnect/qcom,sdm845.h> 61 compatible = "qcom,sdm845-tbu";
|