/linux/Documentation/devicetree/bindings/spi/ |
H A D | rockchip-sfc.yaml | 76 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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/linux/include/dt-bindings/clock/ |
H A D | rk3036-cru.h | 49 #define SCLK_SFC 160 macro
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H A D | rk3128-cru.h | 67 #define SCLK_SFC 153 macro
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H A D | rv1108-cru.h | 30 #define SCLK_SFC 80 macro
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H A D | rk3368-cru.h | 72 #define SCLK_SFC 126 macro
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H A D | rk3308-cru.h | 65 #define SCLK_SFC 61 macro
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H A D | px30-cru.h | 60 #define SCLK_SFC 58 macro
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H A D | rockchip,rv1126-cru.h | 184 #define SCLK_SFC 118 macro
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H A D | rockchip,rk3588-cru.h | 318 #define SCLK_SFC 303 macro
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H A D | rk3568-cru.h | 184 #define SCLK_SFC 120 macro
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rv1126.dtsi | 192 <&cru SCLK_SFC>; 709 assigned-clocks = <&cru SCLK_SFC>; 712 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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H A D | rv1108.dtsi | 540 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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H A D | rk3128.dtsi | 456 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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/linux/drivers/clk/rockchip/ |
H A D | clk-rk3036.c | 344 COMPOSITE(SCLK_SFC, "sclk_sfc", mux_pll_src_dmyapll_dpll_gpll_xin24_p, 0,
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H A D | clk-rk3128.c | 552 COMPOSITE(SCLK_SFC, "sclk_sfc", mux_sclk_sfc_src_p, 0,
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H A D | clk-rv1108.c | 745 COMPOSITE(SCLK_SFC, "sclk_sfc", mux_pll_src_2plls_p, 0,
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H A D | clk-rk3368.c | 585 COMPOSITE(SCLK_SFC, "sclk_sfc", mux_pll_src_cpll_gpll_p, 0,
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H A D | clk-rv1126.c | 814 COMPOSITE(SCLK_SFC, "sclk_sfc", mux_cpll_gpll_p, 0,
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H A D | clk-rk3568.c | 793 COMPOSITE_NODIV(SCLK_SFC, "sclk_sfc", sclk_sfc_p, 0,
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H A D | clk-rk3308.c | 523 COMPOSITE(SCLK_SFC, "clk_sfc", mux_dpll_vpll0_vpll1_p, 0,
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H A D | clk-px30.c | 504 COMPOSITE(SCLK_SFC, "clk_sfc", mux_gpll_cpll_p, 0,
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H A D | clk-rk3588.c | 1473 COMPOSITE(SCLK_SFC, "sclk_sfc", gpll_cpll_24m_p, 0,
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | px30.dtsi | 300 <&cru SCLK_SFC>; 1042 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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H A D | rk3308.dtsi | 816 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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H A D | rk3588-base.dtsi | 1865 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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