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/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dfsl,layerscape-scfg.yaml4 $id: http://devicetree.org/schemas/soc/fsl/fsl,layerscape-scfg.yaml#
13 SCFG is the supplemental configuration unit, that provides SoC specific
21 - fsl,ls1012a-scfg
22 - fsl,ls1021a-scfg
23 - fsl,ls1028a-scfg
24 - fsl,ls1043a-scfg
25 - fsl,ls1046a-scfg
58 compatible = "fsl,ls1021a-scfg", "syscon";
/linux/drivers/hwmon/
H A Dk8temp.c135 u8 scfg; in k8temp_probe() local
171 pci_read_config_byte(pdev, REG_TEMP, &scfg); in k8temp_probe()
172 scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */ in k8temp_probe()
173 pci_write_config_byte(pdev, REG_TEMP, scfg); in k8temp_probe()
174 pci_read_config_byte(pdev, REG_TEMP, &scfg); in k8temp_probe()
176 if (scfg & (SEL_PLACE | SEL_CORE)) { in k8temp_probe()
181 scfg |= (SEL_PLACE | SEL_CORE); in k8temp_probe()
182 pci_write_config_byte(pdev, REG_TEMP, scfg); in k8temp_probe()
188 scfg &= ~SEL_CORE; /* Select sensor 1, core0 */ in k8temp_probe()
189 pci_write_config_byte(pdev, REG_TEMP, scfg); in k8temp_probe()
[all …]
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dscfg.txt1 Freescale Supplement configuration unit (SCFG)
3 SCFG is the supplemental configuration unit, that provides SoC specific
9 - compatible: should be "fsl,<chip>-scfg"
10 - reg: should contain base address and length of SCFG memory-mapped
15 scfg: global-utilities@fc000 {
16 compatible = "fsl,t1040-scfg";
/linux/arch/powerpc/platforms/85xx/
H A Dt1042rdb_diu.c17 /*DIU Pixel ClockCR offset in scfg*/
79 void __iomem *scfg; in t1042rdb_set_pixel_clock() local
84 scfg_np = of_find_compatible_node(NULL, NULL, "fsl,t1040-scfg"); in t1042rdb_set_pixel_clock()
86 pr_err("%s: Missing scfg node. Can not display video.\n", in t1042rdb_set_pixel_clock()
91 scfg = of_iomap(scfg_np, 0); in t1042rdb_set_pixel_clock()
93 if (!scfg) { in t1042rdb_set_pixel_clock()
113 clrbits32(scfg + CCSR_SCFG_PIXCLKCR, in t1042rdb_set_pixel_clock()
117 setbits32(scfg + CCSR_SCFG_PIXCLKCR, PIXCLKCR_PXCKEN | (pxclk << 16)); in t1042rdb_set_pixel_clock()
119 iounmap(scfg); in t1042rdb_set_pixel_clock()
/linux/drivers/pci/controller/dwc/
H A Dpci-layerscape.c67 struct regmap *scfg; member
193 static void scfg_pcie_send_turnoff_msg(struct regmap *scfg, u32 reg, u32 mask) in scfg_pcie_send_turnoff_msg() argument
196 regmap_write_bits(scfg, reg, mask, mask); in scfg_pcie_send_turnoff_msg()
208 regmap_write_bits(scfg, reg, mask, 0); in scfg_pcie_send_turnoff_msg()
216 scfg_pcie_send_turnoff_msg(pcie->scfg, SCFG_PEXPMWRCR(pcie->index), PMXMTTURNOFF); in ls1021a_pcie_send_turnoff_msg()
219 static int scfg_pcie_exit_from_l2(struct regmap *scfg, u32 reg, u32 mask) in scfg_pcie_exit_from_l2() argument
222 regmap_write_bits(scfg, reg, mask, mask); in scfg_pcie_exit_from_l2()
223 regmap_write_bits(scfg, reg, mask, 0); in scfg_pcie_exit_from_l2()
233 return scfg_pcie_exit_from_l2(pcie->scfg, SCFG_PEXSFTRSTCR, PEXSR(pcie->index)); in ls1021a_pcie_exit_from_l2()
241 scfg_pcie_send_turnoff_msg(pcie->scfg, SCFG_PEXPMECR, PEXPME(pcie->index)); in ls1043a_pcie_send_turnoff_msg()
[all …]
/linux/drivers/irqchip/
H A Dirq-mchp-eic.c33 * @scfg: backup for scfg registers (necessary for backup and self-refresh mode)
41 u32 scfg[MCHP_EIC_NIRQ]; member
117 eic->scfg[hwirq] = readl_relaxed(eic->base + in mchp_eic_irq_suspend()
134 writel_relaxed(eic->scfg[hwirq], eic->base + in mchp_eic_irq_resume()
H A Dirq-ls-scfg-msi.c3 * Freescale SCFG MSI(-X) support
132 .name = "SCFG",
417 .name = "ls-scfg-msi",
427 MODULE_DESCRIPTION("Freescale Layerscape SCFG MSI controller driver");
H A Dirq-ls-extirq.c192 * All extirq OF nodes are under a scfg/syscon node with in ls_extirq_of_init()
H A DMakefile85 obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
/linux/Documentation/devicetree/bindings/pci/
H A Dfsl,layerscape-pcie.yaml47 fsl,pcie-scfg:
49 description: A phandle to the SCFG device node. The second entry is the
51 SCFG PEXN registers.
54 - description: A phandle to the SCFG device node
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_dcb_nl.c23 struct ixgbe_dcb_config *scfg = &adapter->temp_dcb_cfg; in ixgbe_copy_dcb_cfg() local
43 src = &scfg->tc_config[i - DCB_PG_ATTR_TC_0]; in ixgbe_copy_dcb_cfg()
93 if (dcfg->bw_percentage[tx][j] != scfg->bw_percentage[tx][j]) { in ixgbe_copy_dcb_cfg()
94 dcfg->bw_percentage[tx][j] = scfg->bw_percentage[tx][j]; in ixgbe_copy_dcb_cfg()
97 if (dcfg->bw_percentage[rx][j] != scfg->bw_percentage[rx][j]) { in ixgbe_copy_dcb_cfg()
98 dcfg->bw_percentage[rx][j] = scfg->bw_percentage[rx][j]; in ixgbe_copy_dcb_cfg()
105 if (dcfg->tc_config[j].dcb_pfc != scfg->tc_config[j].dcb_pfc) { in ixgbe_copy_dcb_cfg()
106 dcfg->tc_config[j].dcb_pfc = scfg->tc_config[j].dcb_pfc; in ixgbe_copy_dcb_cfg()
111 if (dcfg->pfc_mode_enable != scfg->pfc_mode_enable) { in ixgbe_copy_dcb_cfg()
112 dcfg->pfc_mode_enable = scfg->pfc_mode_enable; in ixgbe_copy_dcb_cfg()
/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,secure-proxy.yaml36 - const: scfg
73 reg-names = "target_data", "rt", "scfg";
/linux/drivers/dma/
H A Dst_fdma.c359 maxburst = fchan->scfg.src_maxburst; in config_reqctrl()
360 width = fchan->scfg.src_addr_width; in config_reqctrl()
361 addr = fchan->scfg.src_addr; in config_reqctrl()
366 maxburst = fchan->scfg.dst_maxburst; in config_reqctrl()
367 width = fchan->scfg.dst_addr_width; in config_reqctrl()
368 addr = fchan->scfg.dst_addr; in config_reqctrl()
683 memcpy(&fchan->scfg, slave_cfg, sizeof(fchan->scfg)); in st_fdma_slave_config()
H A Dst_fdma.h120 struct dma_slave_config scfg; member
/linux/sound/soc/qcom/qdsp6/
H A Dq6afe.c545 struct afe_param_id_slot_mapping_cfg *scfg; member
849 kfree(port->scfg); in q6afe_port_free()
1280 port->scfg = kzalloc(sizeof(*port->scfg), GFP_KERNEL); in q6afe_tdm_port_prepare()
1281 if (!port->scfg) in q6afe_tdm_port_prepare()
1284 port->scfg->minor_version = AFE_API_VERSION_SLOT_MAPPING_CONFIG; in q6afe_tdm_port_prepare()
1285 port->scfg->num_channels = cfg->num_channels; in q6afe_tdm_port_prepare()
1286 port->scfg->bitwidth = cfg->bit_width; in q6afe_tdm_port_prepare()
1287 port->scfg->data_align_type = cfg->data_align_type; in q6afe_tdm_port_prepare()
1288 memcpy(port->scfg->ch_mapping, cfg->ch_mapping, in q6afe_tdm_port_prepare()
1505 if (port->scfg) { in q6afe_port_start()
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1043a.dtsi316 scfg: scfg@1570000 { label
317 compatible = "fsl,ls1043a-scfg", "syscon";
898 fsl,pcie-scfg = <&scfg 0>;
925 fsl,pcie-scfg = <&scfg 1>;
952 fsl,pcie-scfg = <&scfg 2>;
H A Dfsl-ls1012a.dtsi171 scfg: scfg@1570000 { label
172 compatible = "fsl,ls1012a-scfg", "syscon";
H A Dfsl-ls1046a.dtsi320 scfg: scfg@1570000 { label
321 compatible = "fsl,ls1046a-scfg", "syscon";
/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a.dtsi181 scfg: scfg@1570000 { label
182 compatible = "fsl,ls1021a-scfg", "syscon";
822 fsl,pcie-scfg = <&scfg 0>;
846 fsl,pcie-scfg = <&scfg 1>;
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dfsl,ls-msi.yaml7 title: Freescale Layerscape SCFG PCIe MSI controller
H A Dfsl,ls-extirq.yaml46 SCFG or the External Interrupt Control Register (IRQCR) in the ISC.
/linux/drivers/mmc/host/
H A Dsdhci-of-esdhc.c867 /* The SCFG, Supplemental Configuration Unit, provides SoC specific
869 * SDHC IO VSEL control register on SCFG for some platforms. It's
873 { .compatible = "fsl,t1040-scfg", },
874 { .compatible = "fsl,ls1012a-scfg", },
875 { .compatible = "fsl,ls1046a-scfg", },
/linux/drivers/soc/fsl/
H A Drcpm.c34 np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-scfg"); in copy_ippdexpcr1_setting()
/linux/arch/powerpc/boot/dts/fsl/
H A Dt1023si-post.dtsi450 scfg: global-utilities@fc000 { label
451 compatible = "fsl,t1023-scfg";
H A Dt1040si-post.dtsi538 scfg: global-utilities@fc000 { label
539 compatible = "fsl,t1040-scfg";

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