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/freebsd/sbin/routed/
H A Dtrace.c582 print_rts(struct rt_spare *rts, in print_rts() argument
593 (void)fprintf(ftrace, "metric=%-2d ", rts->rts_metric); in print_rts()
595 (void)fprintf(ftrace, "%s ", (rts->rts_ifp == NULL ? in print_rts()
596 "if?" : rts->rts_ifp->int_name)); in print_rts()
598 || (force_router == 0 && rts->rts_router != rts->rts_gate)) in print_rts()
600 naddr_ntoa(rts->rts_router)); in print_rts()
602 (void)fprintf(ftrace, "%s ", ts(rts->rts_time)); in print_rts()
604 || (force_tag == 0 && rts->rts_tag != 0)) in print_rts()
605 (void)fprintf(ftrace, "tag=%#x ", ntohs(rts->rts_tag)); in print_rts()
606 if (rts->rts_de_ag != 0) { in print_rts()
[all …]
H A Dinput.c781 struct rt_spare *rts, *rts0; in input_route() local
842 for (rts = rts0, i = NUM_SPARES; i != 0; i--, rts++) { in input_route()
843 if (rts->rts_router == new->rts_router) in input_route()
849 || BETTER_LINK(rt, rts0, rts)) in input_route()
850 rts0 = rts; in input_route()
862 if (new->rts_de_ag > rts->rts_de_ag in input_route()
863 && now_stale <= rts->rts_time) in input_route()
869 if (rts->rts_metric == HOPCNT_INFINITY in input_route()
871 new->rts_time = rts->rts_time; in input_route()
880 if (new->rts_metric > rts->rts_metric) in input_route()
[all …]
H A Dtable.c1706 struct rt_spare *rts; in rtadd() local
1710 for (rts = rt->rt_spares, i = NUM_SPARES; i != 0; i--, rts++) in rtadd()
1711 rts->rts_metric = HOPCNT_INFINITY; in rtadd()
1799 struct rt_spare *rts, *rts1; in rts_better() local
1803 rts = rt->rt_spares+1; in rts_better()
1804 for (i = NUM_SPARES, rts1 = rts+1; i > 2; i--, rts1++) { in rts_better()
1805 if (BETTER_LINK(rt,rts1,rts)) in rts_better()
1806 rts = rts1; in rts_better()
1809 return rts; in rts_better()
1817 struct rt_spare *rts) in rtswitch() argument
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
16 * card must be disabled and the uart1 rts/cts must be output on other DHCOM
73 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
74 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
80 rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
86 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property
88 * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1
95 rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
120 * I: uart1 rts
H A Dimx6ull-dhcom-drc02.dts23 * The signals for CAN2 TX and RX are routed to the DHCOM UART1 RTS/CTS pins.
24 * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1
90 rts-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */
98 rts-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* GPIO P */
/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Drs485.yaml9 description: The RTS signal is capable of automatically controlling line
17 rs485-rts-delay:
22 - description: Delay between rts signal and beginning of data sent in
26 - description: Delay between end of data sent and rts signal in milliseconds.
32 rs485-rts-active-high:
33 description: drive RTS high when sending (this is the default).
36 rs485-rts-active-low:
37 description: drive RTS low when sending (default is high).
41 description: Polarity of receiver enable signal (when separate from RTS).
H A Dserial.yaml58 rts-gpios:
62 the UART's RTS line.
68 for RTS/CTS hardware flow control, and that they are available for use
76 cts-rts-swap:
78 description: CTS and RTS pins are swapped.
117 rts-gpios: false
H A Dsirf-uart.txt13 - rts-gpios: RTS pin for USP-based UART if uart-has-rtscts is true
27 On the board-specific dts, we can put rts-gpios and cts-gpios like
32 rts-gpios = <&gpio 15 0>;
H A Dst,stm32-uart.yaml50 # cts-gpios and rts-gpios properties can be used instead of 'uart-has-rtscts'
54 # It should be noted that both cts-gpios/rts-gpios and 'uart-has-rtscts' or
57 rts-gpios: true
89 rts-gpios: false
130 rs485-rts-active-low;
H A Dfsl-imx-uart.txt15 - rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx,
17 you must enable either the "uart-has-rtscts" or the "rts-gpios"
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Drichtek,rt8515.yaml16 RFS and RTS.
39 richtek,rts-ohms:
42 description: The resistance value of the RTS resistor. This
44 for the property torch-max-microamp to work, the RTS resistor
71 is hardwired to the component using the RTS resistor to
73 according to the formula Imax = 5500 / RTS. The lowest
77 current below the hardware limit. This requires the RTS
100 richtek,rts-ohms = <100000>;
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-370-pinctrl.txt24 mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
43 mpp22 22 gpo, ge0(txd6), ge1(txd2), uart0(rts)
61 mpp40 40 gpio, dev(ad1), uart1(rts), uart0(rts)
69 mpp48 48 gpio, dev(ad9), uart0(rts), sd0(cmd), sata1(prsnt),
86 mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),
87 uart0(rts)
88 mpp59 59 gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk)
H A Dmarvell,kirkwood-pinctrl.txt32 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
42 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd)
70 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
80 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
114 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
124 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
163 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk),
173 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act)
226 mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), mii(col),
236 mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act),
[all …]
H A Dmarvell,armada-38x-pinctrl.txt22 mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
38 mpp20 20 gpio, ge0(txclk), ptp(clk), sata0(prsnt), ua0(rts)
43 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
58 mpp40 40 gpio, i2c1(sda), ge1(rxd3), ua0(rts), sd0(d2), dev(ad6)
60 mpp42 42 gpio, ua1(txd), ua0(rts), dev(ad7)
74 mpp56 56 gpio, ua1(rts), ge(mdc), dram(deccerr), spi1(mosi), ua1(txd)
H A Dmarvell,armada-39x-pinctrl.txt22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
38 mpp20 20 gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc)
44 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
59 mpp40 40 gpio, i2c1(sda), ua0(rts), sd0(d2), dev(ad6), ge(rxd3)
61 mpp42 42 gpio, ua1(txd), ua0(rts), dev(ad7)
78 mpp56 56 gpio, ua1(rts), dram(deccerr), spi1(mosi), ua1(txd)
H A Dmarvell,dove-pinctrl.txt18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
21 uart1(rts), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
33 mpp12 12 gpio, pmu, uart2(rts), audio0(extclk), sdio1(cd),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
/freebsd/usr.sbin/bhyve/
H A Dpci_xhci.c741 struct pci_xhci_rtsregs *rts; in pci_xhci_insert_event() local
749 rts = &sc->rtsregs; in pci_xhci_insert_event()
751 erdp = rts->intrreg.erdp & ~0xF; in pci_xhci_insert_event()
752 erdp_idx = (erdp - rts->erstba_p[rts->er_deq_seg].qwEvrsTablePtr) / in pci_xhci_insert_event()
758 erdp_idx, rts->er_deq_seg, rts->er_enq_idx, in pci_xhci_insert_event()
759 rts->er_enq_seg, rts->event_pcs)); in pci_xhci_insert_event()
761 erdp, rts->erstba_p->qwEvrsTablePtr, in pci_xhci_insert_event()
762 rts->erstba_p->dwEvrsTableSize, do_intr)); in pci_xhci_insert_event()
764 evtrbptr = &rts->erst_p[rts->er_enq_idx]; in pci_xhci_insert_event()
767 if (rts->er_events_cnt >= rts->erstba_p->dwEvrsTableSize) { in pci_xhci_insert_event()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-nano.dts170 rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
171 rs485-rts-active-high;
173 rs485-rts-delay = <1 1>;
181 rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
182 rs485-rts-active-high;
183 rs485-rts-delay = <1 1>;
190 rts-gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>;
191 rs485-rts-active-high;
193 rs485-rts-delay = <1 1>;
201 rts-gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
[all …]
/freebsd/sys/dev/usb/serial/
H A Duftdi_reg.h69 * Clear RTS
133 * NOTE: If the device is in RTS/CTS flow control, the RTS set by this
135 * Also - you can not set DTR and RTS with one control message
141 * B1 RTS state
148 * B9 RTS state enable
150 * 1 = use RTS state
170 * B0 Output handshaking using RTS/CTS
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dtso5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
30 rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dts5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
34 rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dts5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
34 rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
34 rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
/freebsd/sys/dev/ath/ath_rate/sample/
H A Dsample.h137 int rts, cts; in calc_usecs_unicast_packet() local
185 rts = cts = 0; in calc_usecs_unicast_packet()
190 rts = 1; in calc_usecs_unicast_packet()
198 rts = 1; in calc_usecs_unicast_packet()
201 if (rts || cts) { in calc_usecs_unicast_packet()
211 if (rts) /* SIFS + CTS */ in calc_usecs_unicast_packet()
/freebsd/share/timedef/
H A Det_EE.ISO8859-15.src9 m�rts
23 m�rts
71 m�rts

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