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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dcs2000-cp.txt7 - clocks: common clock binding for CLK_IN, XTI/REF_CLK
8 - clock-names: CLK_IN : clk_in, XTI/REF_CLK : ref_clk
20 clock-names = "clk_in", "ref_clk";
H A Dcirrus,cs2000-cp.yaml25 Common clock binding for CLK_IN, XTI/REF_CLK
31 - const: ref_clk
44 - 0 # CS2000CP_AUX_OUTPUT_REF_CLK: ref_clk input
61 output signal directly from the REF_CLK input.
87 clock-names = "clk_in", "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dnxp,tja11xx.yaml52 The REF_CLK is provided for both transmitted and received data
56 connected to pin REF_CLK. A third option is to connect a 25MHz
57 clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
59 If present, indicates that the REF_CLK will be configured as
61 If not present, the REF_CLK will be configured as interface
/freebsd/sys/contrib/device-tree/Bindings/ufs/
H A Dqcom,ufs.yaml135 - const: ref_clk
169 - const: ref_clk
198 - const: ref_clk
230 - const: ref_clk
257 - const: ref_clk
332 "ref_clk",
H A Dufs-qcom.txt23 order as the clocks property. "ref_clk_src", "ref_clk",
30 - vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
47 "ref_clk",
H A Dufshcd-pltfrm.txt43 "ref_clk" indicates reference clock frequency.
46 26 MHz, 38.4 MHz, 52MHz) for reference clock. This "ref_clk" entry is
83 clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
H A Drenesas,ufs.yaml28 - const: ref_clk
57 clock-names = "fck", "ref_clk";
H A Dufs-hisi.txt16 order as the clocks property. "ref_clk", "phy_clk" is optional
37 clock-names = "ref_clk", "phy_clk";
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Damlogic,meson-g12a-usb3-pcie-phy.yaml26 - const: ref_clk
54 clocks = <&ref_clk>;
55 clock-names = "ref_clk";
H A Damlogic,g12a-usb3-pcie-phy.yaml26 - const: ref_clk
59 clocks = <&ref_clk>;
60 clock-names = "ref_clk";
H A Dsamsung,ufs-phy.yaml78 - const: ref_clk
91 - const: ref_clk
109 clock-names = "ref_clk", "rx1_symbol_clk",
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Dapple,i2c.yaml44 Allowed values are between ref_clk/(16*4) and ref_clk/(16*255).
64 clocks = <&ref_clk>;
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Drockchip,dwc3.txt8 "ref_clk" Controller reference clk, have to be 24 MHz
28 clock-names = "ref_clk", "suspend_clk",
45 clock-names = "ref_clk", "suspend_clk",
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dahb.c96 ar_ahb->ref_clk = devm_clk_get(dev, "wifi_wcss_ref"); in ath10k_ahb_clock_init()
97 if (IS_ERR_OR_NULL(ar_ahb->ref_clk)) { in ath10k_ahb_clock_init()
99 PTR_ERR(ar_ahb->ref_clk)); in ath10k_ahb_clock_init()
100 return ar_ahb->ref_clk ? PTR_ERR(ar_ahb->ref_clk) : -ENODEV; in ath10k_ahb_clock_init()
118 ar_ahb->ref_clk = NULL; in ath10k_ahb_clock_deinit()
128 IS_ERR_OR_NULL(ar_ahb->ref_clk) || in ath10k_ahb_clock_enable()
141 ret = clk_prepare_enable(ar_ahb->ref_clk); in ath10k_ahb_clock_enable()
156 clk_disable_unprepare(ar_ahb->ref_clk); in ath10k_ahb_clock_enable()
171 clk_disable_unprepare(ar_ahb->ref_clk); in ath10k_ahb_clock_disable()
/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dxilinx-zynq-fpga-mgr.txt8 - clock-names: name for the clock, should be "ref_clk"
17 clock-names = "ref_clk";
H A Dxilinx-zynq-fpga-mgr.yaml27 - const: ref_clk
50 clock-names = "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dcdns,rtc.txt12 - ref_clk: reference 1Hz or 100Hz clock, depending on IP configuration
20 clock-names = "pclk", "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Djcore,spi.txt15 - clocks: If a phandle named "ref_clk" is present, SPI clock speed
33 clock-names = "ref_clk";
H A Dspi-zynq-qspi.txt9 - clock-names : List of input clock names - "ref_clk", "pclk"
22 clock-names = "ref_clk", "pclk";
H A Dspi-zynqmp-qspi.txt9 - clock-names : List of input clock names - "ref_clk", "pclk"
19 clock-names = "ref_clk", "pclk";
H A Dspi-cadence.txt9 - clock-names : List of input clock names - "ref_clk", "pclk"
23 clock-names = "ref_clk", "pclk";
H A Dxlnx,zynq-qspi.yaml37 - const: ref_clk
56 clock-names = "ref_clk", "pclk";
H A Dspi-zynqmp-qspi.yaml29 - const: ref_clk
60 clock-names = "ref_clk", "pclk";
H A Dspi-cadence.yaml29 - const: ref_clk
78 clock-names = "ref_clk", "pclk";
/freebsd/sys/dev/iicbus/controller/cadence/
H A Dcdnc_i2c.c91 clk_t ref_clk; member
560 else if (clk_get_by_ofw_index(dev, node, 0, &sc->ref_clk) == 0) { in cdnc_i2c_attach()
561 if ((err = clk_enable(sc->ref_clk)) != 0) in cdnc_i2c_attach()
564 else if ((err = clk_get_freq(sc->ref_clk, &freq)) != 0) in cdnc_i2c_attach()
631 if (sc->ref_clk != NULL) { in cdnc_i2c_detach()
632 clk_release(sc->ref_clk); in cdnc_i2c_detach()
633 sc->ref_clk = NULL; in cdnc_i2c_detach()

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