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/linux/drivers/i2c/busses/
H A Di2c-qup.c25 /* QUP Registers */
45 /* QUP States and reset values */
58 /* QUP OPERATIONAL FLAGS */
97 /* QUP tags */
105 /* QUP v2 tags */
144 * Max tags length (start, stop and maximum 2 bytes address) for each QUP
164 * total_tx_len: total tx length including tag bytes for current QUP transfer
165 * total_rx_len: total rx length including tag bytes for current QUP transfer
167 * tx_fifo_free: number of free bytes in current QUP block write.
170 * QUP block read
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280.dtsi935 qup_opp_table: opp-table-qup {
1089 compatible = "qcom,geni-se-qup";
1113 interconnect-names = "qup-core", "qup-config",
1114 "qup-memory";
1137 interconnect-names = "qup-core", "qup-config";
1156 interconnect-names = "qup-core", "qup-config";
1173 interconnect-names = "qup-core", "qup-config",
1174 "qup-memory";
1197 interconnect-names = "qup-core", "qup-config";
1216 interconnect-names = "qup-core", "qup-config";
[all …]
H A Dx1e80100.dtsi800 compatible = "qcom,geni-se-qup";
831 interconnect-names = "qup-core",
832 "qup-config",
833 "qup-memory";
864 interconnect-names = "qup-core",
865 "qup-config",
866 "qup-memory";
897 interconnect-names = "qup-core",
898 "qup-config",
899 "qup-memory";
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H A Dsm8250.dtsi373 qup_virt: interconnect-qup-virt {
374 compatible = "qcom,sm8250-qup-virt";
746 qup_opp_table: opp-table-qup {
1010 compatible = "qcom,geni-se-qup";
1036 interconnect-names = "qup-core",
1037 "qup-config",
1038 "qup-memory";
1058 interconnect-names = "qup-core",
1059 "qup-config",
1060 "qup-memory";
[all …]
H A Dsm8450.dtsi380 qup_opp_table_100mhz: opp-table-qup {
797 compatible = "qcom,geni-se-qup";
821 interconnect-names = "qup-core", "qup-config", "qup-memory";
838 interconnect-names = "qup-core", "qup-config";
860 interconnect-names = "qup-core", "qup-config", "qup-memory";
877 interconnect-names = "qup-core", "qup-config";
899 interconnect-names = "qup-core", "qup-config", "qup-memory";
916 interconnect-names = "qup-core", "qup-config";
938 interconnect-names = "qup-core", "qup-config", "qup-memory";
955 interconnect-names = "qup-core", "qup-config";
[all …]
H A Dsc8180x.dtsi523 qup_virt: interconnect-qup-virt {
524 compatible = "qcom,sc8180x-qup-virt";
798 compatible = "qcom,geni-se-qup";
818 interconnect-names = "qup-core", "qup-config", "qup-memory";
832 interconnect-names = "qup-core", "qup-config";
846 interconnect-names = "qup-core", "qup-config";
859 interconnect-names = "qup-core", "qup-config", "qup-memory";
873 interconnect-names = "qup-core", "qup-config";
887 interconnect-names = "qup-core", "qup-config";
900 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dsdx75.dtsi524 compatible = "qcom,geni-se-qup";
533 interconnect-names = "qup-core";
555 interconnect-names = "qup-core", "qup-config", "qup-memory";
578 interconnect-names = "qup-core", "qup-config", "qup-memory";
594 interconnect-names = "qup-core",
595 "qup-config";
620 interconnect-names = "qup-core", "qup-config", "qup-memory";
643 interconnect-names = "qup-core", "qup-config", "qup-memory";
666 interconnect-names = "qup-core", "qup-config", "qup-memory";
689 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dsdm670.dtsi717 compatible = "qcom,geni-se-qup";
727 interconnect-names = "qup-core";
744 interconnect-names = "qup-core", "qup-config", "qup-memory";
765 interconnect-names = "qup-core", "qup-config", "qup-memory";
786 interconnect-names = "qup-core", "qup-config", "qup-memory";
807 interconnect-names = "qup-core", "qup-config", "qup-memory";
828 interconnect-names = "qup-core", "qup-config", "qup-memory";
849 interconnect-names = "qup-core", "qup-config", "qup-memory";
870 interconnect-names = "qup-core", "qup-config", "qup-memory";
891 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dsdm845.dtsi687 qup_opp_table: opp-table-qup {
1263 compatible = "qcom,geni-se-qup";
1273 interconnect-names = "qup-core";
1291 interconnect-names = "qup-core", "qup-config", "qup-memory";
1310 interconnect-names = "qup-core", "qup-config";
1329 interconnect-names = "qup-core", "qup-config";
1348 interconnect-names = "qup-core", "qup-config", "qup-memory";
1367 interconnect-names = "qup-core", "qup-config";
1386 interconnect-names = "qup-core", "qup-config";
1405 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dsm8650.dtsi821 compatible = "qcom,geni-se-qup";
854 interconnect-names = "qup-core",
855 "qup-config",
856 "qup-memory";
887 interconnect-names = "qup-core",
888 "qup-config",
889 "qup-memory";
920 interconnect-names = "qup-core",
921 "qup-config",
922 "qup-memory";
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H A Dsc7180.dtsi558 qup_opp_table: opp-table-qup {
878 compatible = "qcom,geni-se-qup";
902 interconnect-names = "qup-core", "qup-config",
903 "qup-memory";
923 interconnect-names = "qup-core", "qup-config";
939 interconnect-names = "qup-core", "qup-config";
956 interconnect-names = "qup-core", "qup-config",
957 "qup-memory";
977 interconnect-names = "qup-core", "qup-config";
993 interconnect-names = "qup-core", "qup-config";
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H A Dsm8550.dtsi830 compatible = "qcom,geni-se-qup";
855 interconnect-names = "qup-core", "qup-config", "qup-memory";
873 interconnect-names = "qup-core", "qup-config", "qup-memory";
895 interconnect-names = "qup-core", "qup-config", "qup-memory";
913 interconnect-names = "qup-core", "qup-config", "qup-memory";
935 interconnect-names = "qup-core", "qup-config", "qup-memory";
953 interconnect-names = "qup-core", "qup-config", "qup-memory";
975 interconnect-names = "qup-core", "qup-config", "qup-memory";
993 interconnect-names = "qup-core", "qup-config", "qup-memory";
1015 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dqdu1000.dtsi422 compatible = "qcom,geni-se-qup";
430 interconnect-names = "qup-core";
638 compatible = "qcom,geni-se-qup";
1077 qup_uart0_default: qup-uart0-default-state {
1082 qup_i2c1_data_clk: qup-i2c1-data-clk-state {
1087 qup_spi1_data_clk: qup-spi1-data-clk-state {
1092 qup_spi1_cs: qup-spi1-cs-state {
1097 qup_i2c2_data_clk: qup-i2c2-data-clk-state {
1102 qup_spi2_data_clk: qup-spi2-data-clk-state {
1107 qup_spi2_cs: qup-spi2-cs-state {
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H A Dsa8775p.dtsi855 compatible = "qcom,geni-se-qup";
880 interconnect-names = "qup-core",
881 "qup-config",
882 "qup-memory";
901 interconnect-names = "qup-core",
902 "qup-config",
903 "qup-memory";
922 interconnect-names = "qup-core",
923 "qup-config",
924 "qup-memory";
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H A Dsc8280xp.dtsi887 compatible = "qcom,geni-se-qup";
912 interconnect-names = "qup-core", "qup-config", "qup-memory";
928 interconnect-names = "qup-core", "qup-config", "qup-memory";
944 interconnect-names = "qup-core", "qup-config", "qup-memory";
960 interconnect-names = "qup-core", "qup-config", "qup-memory";
974 interconnect-names = "qup-core", "qup-config";
990 interconnect-names = "qup-core", "qup-config", "qup-memory";
1006 interconnect-names = "qup-core", "qup-config", "qup-memory";
1022 interconnect-names = "qup-core", "qup-config", "qup-memory";
1038 interconnect-names = "qup-core", "qup-config", "qup-memory";
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H A Dqcm2290.dtsi462 qup_i2c0_default: qup-i2c0-default-state {
469 qup_i2c1_default: qup-i2c1-default-state {
476 qup_i2c2_default: qup-i2c2-default-state {
483 qup_i2c3_default: qup-i2c3-default-state {
490 qup_i2c4_default: qup-i2c4-default-state {
497 qup_i2c5_default: qup-i2c5-default-state {
504 qup_spi0_default: qup-spi0-default-state {
511 qup_spi1_default: qup-spi1-default-state {
518 qup_spi2_default: qup-spi2-default-state {
525 qup_spi3_default: qup-spi3-default-state {
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H A Dsm6125.dtsi440 qup_i2c0_default: qup-i2c0-default-state {
447 qup_i2c0_sleep: qup-i2c0-sleep-state {
454 qup_i2c1_default: qup-i2c1-default-state {
461 qup_i2c1_sleep: qup-i2c1-sleep-state {
468 qup_i2c2_default: qup-i2c2-default-state {
475 qup_i2c2_sleep: qup-i2c2-sleep-state {
482 qup_i2c3_default: qup-i2c3-default-state {
489 qup_i2c3_sleep: qup-i2c3-sleep-state {
496 qup_i2c4_default: qup-i2c4-default-state {
503 qup_i2c4_sleep: qup-i2c4-sleep-state {
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H A Dsm6115.dtsi281 qup_opp_table: opp-table-qup {
636 qup_i2c0_default: qup-i2c0-default-state {
643 qup_i2c1_default: qup-i2c1-default-state {
650 qup_i2c2_default: qup-i2c2-default-state {
657 qup_i2c3_default: qup-i2c3-default-state {
664 qup_i2c4_default: qup-i2c4-default-state {
671 qup_i2c5_default: qup-i2c5-default-state {
678 qup_spi0_default: qup-spi0-default-state {
685 qup_spi1_default: qup-spi1-default-state {
692 qup_spi2_default: qup-spi2-default-state {
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/linux/drivers/spi/
H A Dspi-qup.c367 struct spi_qup *qup = data; in spi_qup_dma_done() local
369 complete(&qup->done); in spi_qup_dma_done()
417 struct spi_qup *qup = spi_controller_get_devdata(host); in spi_qup_prep_sg() local
433 desc->callback_param = qup; in spi_qup_prep_sg()
474 struct spi_qup *qup = spi_controller_get_devdata(host); in spi_qup_do_dma() local
478 ret = spi_qup_vote_bw(qup, xfer->speed_hz); in spi_qup_do_dma()
480 dev_err(qup->dev, "fail to vote for ICC bandwidth: %d\n", ret); in spi_qup_do_dma()
496 qup->n_words = spi_qup_sgl_get_nents_len(rx_sgl, in spi_qup_do_dma()
497 SPI_MAX_XFER, &rx_nents) / qup->w_size; in spi_qup_do_dma()
499 qup->n_words = spi_qup_sgl_get_nents_len(tx_sgl, in spi_qup_do_dma()
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/linux/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-geni-qcom.yaml7 title: Qualcomm Geni based QUP I2C Controller
101 - const: qup-core
102 - const: qup-config
116 - const: qup-core
117 - const: qup-config
118 - const: qup-memory
142 interconnect-names = "qup-core", "qup-config", "qup-memory";
H A Dqcom,i2c-qup.yaml4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#
7 title: Qualcomm Universal Peripheral (QUP) I2C controller
20 - qcom,i2c-qup-v1.1.1 # for 8660, 8960 and 8064
21 - qcom,i2c-qup-v2.1.1 # for 8974 v1
22 - qcom,i2c-qup-v2.2.1 # for 8974 v2 and later
73 compatible = "qcom,i2c-qup-v2.2.1";
/linux/Documentation/devicetree/bindings/spi/
H A Dqcom,spi-geni-qcom.yaml7 title: GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
15 The QUP v3 core is a GENI based AHB slave that provides a common data path
23 Peripharal. Please refer GENI based QUP wrapper controller node bindings
54 - const: qup-core
55 - const: qup-config
56 - const: qup-memory
99 interconnect-names = "qup-core", "qup-config";
H A Dqcom,spi-qup.yaml4 $id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#
7 title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
15 The QUP core is an AHB slave that provides a common data path (an output FIFO
27 - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064
28 - qcom,spi-qup-v2.1.1 # for 8974 and later
29 - qcom,spi-qup-v2.2.1 # for 8974 v2 and later
78 compatible = "qcom,spi-qup-v2.2.1";
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,geni-se.yaml7 title: GENI Serial Engine QUP Wrapper Controller
13 Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
16 Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP
23 - qcom,geni-se-qup
27 description: QUP wrapper common register address and length.
50 const: qup-core
130 compatible = "qcom,geni-se-qup";
/linux/Documentation/devicetree/bindings/serial/
H A Dqcom,serial-geni-qcom.yaml7 title: Qualcomm Geni based QUP UART interface
33 - const: qup-core
34 - const: qup-config
84 interconnect-names = "qup-core", "qup-config";

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