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Searched full:qce (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/crypto/qce/
H A Dcore.c43 struct qce_device *qce = data; in qce_unregister_algs() local
48 ops->unregister_algs(qce); in qce_unregister_algs()
52 static int devm_qce_register_algs(struct qce_device *qce) in devm_qce_register_algs() argument
59 ret = ops->register_algs(qce); in devm_qce_register_algs()
62 ops->unregister_algs(qce); in devm_qce_register_algs()
67 return devm_add_action_or_reset(qce->dev, qce_unregister_algs, qce); in devm_qce_register_algs()
87 static int qce_handle_queue(struct qce_device *qce, in qce_handle_queue() argument
93 scoped_guard(mutex, &qce->lock) { in qce_handle_queue()
95 ret = crypto_enqueue_request(&qce->queue, req); in qce_handle_queue()
98 if (qce->req) in qce_handle_queue()
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H A Dcommon.c21 static inline u32 qce_read(struct qce_device *qce, u32 offset) in qce_read() argument
23 return readl(qce->base + offset); in qce_read()
26 static inline void qce_write(struct qce_device *qce, u32 offset, u32 val) in qce_write() argument
28 writel(val, qce->base + offset); in qce_write()
31 static inline void qce_write_array(struct qce_device *qce, u32 offset, in qce_write_array() argument
37 qce_write(qce, offset + i * sizeof(u32), val[i]); in qce_write_array()
41 qce_clear_array(struct qce_device *qce, u32 offset, unsigned int len) in qce_clear_array() argument
46 qce_write(qce, offset + i * sizeof(u32), 0); in qce_clear_array()
49 static u32 qce_config_reg(struct qce_device *qce, int little) in qce_config_reg() argument
51 u32 beats = (qce->burst_size >> 3) - 1; in qce_config_reg()
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H A Dcommon.h94 struct qce_device *qce; member
100 int qce_check_status(struct qce_device *qce, u32 *status);
101 void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step);
/linux/Documentation/devicetree/bindings/crypto/
H A Dqcom-qce.yaml4 $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
14 This document defines the binding for the QCE crypto
30 - qcom,ipq4019-qce
31 - qcom,sm8150-qce
32 - const: qcom,qce
36 - qcom,ipq6018-qce
37 - qcom,ipq8074-qce
38 - qcom,ipq9574-qce
39 - qcom,msm8996-qce
40 - qcom,qcm2290-qce
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/linux/drivers/crypto/
H A DKconfig580 prompt "Algorithms enabled for QCE acceleration"
587 The QCE engine does not appear to scale as well as the CPU to handle
589 QCE handles only 2 requests in parallel.
646 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
/linux/arch/arm64/boot/dts/qcom/
H A Dagatti.dtsi843 compatible = "qcom,qcm2290-qce", "qcom,ipq4019-qce", "qcom,qce";
H A Dsm6350.dtsi1259 compatible = "qcom,sm6350-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dsm6115.dtsi877 compatible = "qcom,sm6115-qce", "qcom,ipq4019-qce", "qcom,qce";
H A Dsm8750.dtsi2080 compatible = "qcom,sm8750-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dsm8350.dtsi1823 compatible = "qcom,sm8350-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dtalos.dtsi1515 compatible = "qcom,qcs615-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dsm8450.dtsi5397 compatible = "qcom,sm8450-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dsm8250.dtsi2613 compatible = "qcom,sm8250-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dsm8550.dtsi2329 compatible = "qcom,sm8550-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dkodiak.dtsi2594 compatible = "qcom,sc7280-qce", "qcom,sm8150-qce", "qcom,qce";
H A Dsm8150.dtsi2151 compatible = "qcom,sm8150-qce", "qcom,qce";
H A Dsm8650.dtsi4105 compatible = "qcom,sm8650-qce", "qcom,sm8150-qce", "qcom,qce";