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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-qmx6.dtsi358 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x110b0 /* Q7[67] HDA_SDO */
359 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x30b0 /* Q7[59] HDA_SYNC */
360 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x30b0 /* Q7[65] HDA_SDI */
361 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x30b0 /* Q7[63] HDA_BITCLK */
365 /* PHY is on System on Module, Q7[3-15] have Ethernet lines */
399 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 /* Q7[66] I2C_CLK */
400 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 /* Q7[68] I2C_DAT */
406 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x1b0b0 /* Q7[66] I2C_CLK */
407 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b0 /* Q7[68] I2C_DAT */
413 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 /* Q7[152] SDVO_CTRL_CLK */
[all …]
H A Dimx6q-dfi-fs700-m60.dts15 model = "DFI FS700-M60-6QD i.MX6qd Q7 Board";
H A Dimx6dl-dfi-fs700-m60.dts15 model = "DFI FS700-M60-6DL i.MX6dl Q7 Board";
/linux/arch/arm/crypto/
H A Dcurve25519-core.S78 vshr.u64 q7, q7, #29
90 vand q7, q7, q3
117 vadd.i64 q7, q7, q12
119 vadd.i64 q15, q7, q0
133 vsub.i64 q7, q7, q12
144 vsub.i64 q7, q8, q12
161 vshl.i64 q7, q8, #26
166 vsub.i64 q3, q6, q7
227 veor q10, q7, q9
237 veor q6, q7, q10
[all …]
H A Dcrct10dif-ce-core.S170 vld1.64 {q6-q7}, [buf]!
178 CPU_LE( vrev64.8 q7, q7 )
200 // While >= 128 data bytes remain (not counting q0-q7), fold the 128
201 // bytes q0-q7 into them, storing the result back into q0-q7.
206 fold_32_bytes q6, q7
210 // Now fold the 112 bytes in q0-q6 into the 16 bytes in q7.
217 fold_16_bytes q3, q7, 1
220 fold_16_bytes q5, q7, 1
222 fold_16_bytes q6, q7
225 // (not counting q7), following the previous extra subtraction by 128.
[all …]
H A Daes-neonbs-core.S435 vld1.32 {q7}, [r1]! // load round 0 key
447 vst1.8 {q7}, [r0, :128]! // save round 0 key
450 __tbl q7, q15, q14
454 vtst.8 q0, q7, q8
455 vtst.8 q1, q7, q9
456 vtst.8 q2, q7, q10
457 vtst.8 q3, q7, q11
458 vtst.8 q4, q7, q12
459 vtst.8 q5, q7, q13
460 vtst.8 q6, q7, q6
[all …]
H A Dchacha-neon-core.S160 vld1.8 {q6-q7}, [ip]
176 veor q3, q3, q7
244 vdup.32 q7, d3[1]
266 vadd.i32 q3, q3, q7
297 veor q9, q7, q11
299 vshl.u32 q7, q9, #12
301 vsri.u32 q7, q9, #20
311 vadd.i32 q3, q3, q7
348 veor q9, q7, q11
350 vshl.u32 q7, q9, #7
[all …]
H A Daes-ce-core.S261 vmov q7, q3
267 vmov q15, q7
380 vld1.8 {q7}, [r5] @ load ctr
398 * counter values are prepared by successive manipulations of q7.
401 vmov q0, q7
404 vmov s31, ip @ set lane 3 of q1 via q7
407 vmov q1, q7
408 vmov s31, lr @ set lane 3 of q2 via q7
410 vmov q2, q7
411 vmov s31, ip @ set lane 3 of q3 via q7
[all …]
H A Dblake2b-neon-core.S64 // NEON registers q0-q7. The message block is in q8..q15 (M_0-M_15). The stack
86 veor q7, q7, q1
88 vrev64.32 q7, q7
92 vadd.u64 q5, q5, q7
121 veor q7, q7, q1
129 vadd.u64 q5, q5, q7
266 vld1.64 {q6-q7}, [r10] // Load IV[4..7]
275 // entire state matrix in q0-q7 and the entire message block in q8-15.
287 veor q7, q7, q15 // v[14..15] = IV[6..7] ^ f[0..1]
319 veor q3, q3, q7 // v[6..7] ^= v[14..15]
H A Dcrc32-ce-core.S153 vmull.p64 q7, d7, dCONSTANTh
165 veor.8 q3, q3, q7
166 vld1.8 {q7}, [BUF, :128]!
172 veor.8 q3, q3, q7
H A Dnh-neon-core.S35 K3 .req q7
H A Dsha1-ce-core.S27 dgb .req q7
H A Dsha2-ce-core.S16 k0 .req q7
/linux/arch/arm/boot/dts/renesas/
H A DMakefile10 r8a7742-iwg21d-q7.dtb \
11 r8a7742-iwg21d-q7-dbcm-ca.dtb \
12 r8a7743-iwg20d-q7.dtb \
13 r8a7743-iwg20d-q7-dbcm-ca.dtb \
15 r8a7744-iwg20d-q7.dtb \
16 r8a7744-iwg20d-q7-dbcm-ca.dtb \
H A Dr8a7742-iwg21d-q7-dbcm-ca.dts13 #include "r8a7742-iwg21d-q7.dts"
231 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
232 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
265 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
266 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
297 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
298 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
328 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
329 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
H A Dr8a7743-iwg20d-q7-dbcm-ca.dts10 #include "iwg20d-q7-common.dtsi"
11 #include "iwg20d-q7-dbcm-ca.dtsi"
14 model = "iW-RainboW-G20D-Q7 RZ/G1M based plus camera daughter board";
H A Dr8a7744-iwg20d-q7-dbcm-ca.dts11 #include "iwg20d-q7-common.dtsi"
12 #include "iwg20d-q7-dbcm-ca.dtsi"
H A Dr8a7744-iwg20d-q7.dts10 #include "iwg20d-q7-common.dtsi"
H A Dr8a7743-iwg20d-q7.dts10 #include "iwg20d-q7-common.dtsi"
/linux/drivers/net/can/usb/
H A DKconfig165 from Theobroma Systems like the A31-µQ7 and the RK3399-Q7
166 (https://www.theobroma-systems.com/rk3399-q7)
/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-latch.yaml26 OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|<
39 `----------------------------|D7 Q7|-----|<
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-puma.dtsi158 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
434 * As Q7 does not specify neither a global nor a RX clock for I2S these
484 q7_thermal_pin: q7-thermal-pin {
/linux/tools/testing/selftests/arm64/fp/
H A Dfp-ptrace-asm.S32 ldp q6, q7, [x7, #16 * 6]
154 stp q6, q7, [x7, #16 * 6]
/linux/drivers/gpio/
H A Dgpio-latch.c20 * OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|<
33 * `----------------------------|D7 Q7|-----|<
/linux/arch/arm64/include/asm/
H A Dfpsimdmacros.h15 stp q6, q7, [\state, #16 * 6]
51 ldp q6, q7, [\state, #16 * 6]

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