| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-fpga-manager | 13 wrong during FPGA programming (something that the driver can't
30 * write init = preparing FPGA for programming
31 * write init error = Error while preparing FPGA for programming
33 * write error = Error while programming
34 * write complete = Doing post programming steps
35 * write complete error = Error while doing post programming
43 If FPGA programming operation fails, it could be caused by crc
46 programming errors to userspace. This is a list of strings for
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn5_funcs_mode_programming.c | 18 const struct dml2_display_cfg_programming *programming = in_out_params->programming; in dcn5_mode_programming() local
47 mode_lib->mp.GlobalDPPCLK = programming->min_clocks.dcn4x.dpprefclk_khz / 1000.0; in dcn5_mode_programming()
85 mode_lib->mp.Dppclk[k] = programming->plane_programming[k].min_clocks.dcn4x.dppclk_khz / 1000.0; in dcn5_mode_programming()
91 …mode_lib->mp.DSCCLK[k] = programming->stream_programming[stream_index].min_clocks.dcn4x.dscclk_khz… in dcn5_mode_programming()
95 mode_lib->mp.Dispclk = programming->min_clocks.dcn4x.dispclk_khz / 1000.0; in dcn5_mode_programming()
96 mode_lib->mp.DCFCLKDeepSleep = programming->min_clocks.dcn4x.deepsleep_dcfclk_khz / 1000.0; in dcn5_mode_programming()
1585 static void dcn5_populate_mcache_allocation(struct dml2_display_cfg_programming *programming, in dcn5_populate_mcache_allocation() argument
1591 programming->plane_programming[i].mcache_allocation = solution->mcache_allocations[i]; in dcn5_populate_mcache_allocation()
1597 struct dml2_display_cfg_programming *programming) in dcn5_pack_mode_programming_params() argument
1611 memcpy(&programming->display_config, mode_prog->in_display_cfg, sizeof(struct dml2_display_cfg)); in dcn5_pack_mode_programming_params()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_wrapper.c | 40 …DC_RUN_WITH_PREEMPTION_ENABLED((*dml_ctx)->v21.mode_programming.programming = vzalloc(sizeof(struc… in dml21_allocate_memory()
42 if (!((*dml_ctx)->v21.mode_programming.programming)) in dml21_allocate_memory()
62 DC_RUN_WITH_PREEMPTION_ENABLED(vfree(dml2->v21.mode_programming.programming)); in dml21_destroy()
70 …dml2_display_cfg_programming *dst_dml2_programming = dst_dml_ctx->v21.mode_programming.programming; in dml21_copy()
77 …memcpy(dst_dml2_programming, src_dml_ctx->v21.mode_programming.programming, sizeof(struct dml2_dis… in dml21_copy()
88 dst_dml_ctx->v21.mode_programming.programming = dst_dml2_programming; in dml21_copy()
|
| /linux/Documentation/driver-api/fpga/ |
| H A D | fpga-programming.rst | 1 In-kernel API for FPGA Programming
7 The in-kernel API for FPGA programming is a combination of APIs from
9 trigger FPGA programming is fpga_region_program_fpga().
31 bridges to control during programming or it has a pointer to a function that
71 /* Add info to region and do the programming */
84 API for programming an FPGA
|
| H A D | intro.rst | 26 If you are adding a new FPGA or a new method of programming an FPGA,
36 region of an FPGA during programming. They are disabled before
37 programming begins and re-enabled afterwards. An FPGA bridge may be
|
| /linux/tools/memory-model/Documentation/ |
| H A D | references.txt | 34 Proceedings of the 32Nd ACM SIGPLAN Conference on Programming
41 ACM SIGPLAN Conference on Programming Language Design and
55 SIGPLAN-SIGACT Symposium on Principles of Programming Languages
62 Principles of Programming Languages (POPL 2017). ACM, New York,
68 Proceedings of the ACM on Programming Languages, Volume 2, Issue
91 Programming Languages and Operating Systems (ASPLOS 2018). ACM,
|
| /linux/drivers/net/wireless/rsi/ |
| H A D | rsi_boot_params.h | 58 /* structure to store configs related to TAPLL programming */
64 /* structure to store configs related to PLL960 programming */
71 /* structure to store configs related to AFEPLL programming */
92 /* structure to store configs related to UMAC clk programming */
149 /* WDT programming values */
|
| /linux/drivers/net/ethernet/intel/i40e/ |
| H A D | i40e_txrx_common.h | 87 * i40e_rx_is_programming_status - check for programming status descriptor
91 * is a programming status descriptor for flow director or FCoE
97 /* The Rx filter programming status and SPH bit occupy the same in i40e_rx_is_programming_status()
100 * programming status descriptor. in i40e_rx_is_programming_status()
|
| /linux/Documentation/driver-api/soundwire/ |
| H A D | error_handling.rst | 16 Improvements could be invalidating an entire programming sequence and
22 that bus clashes due to programming errors (two streams using the same bit
34 be applied. In case of a bad programming (command sent to non-existent
38 backtracking and restarting the entire programming sequence might be a
|
| /linux/Documentation/misc-devices/ |
| H A D | c2port.rst | 26 C2 Interface used for in-system programming of micro controllers.
38 - AN127: FLASH Programming via the C2 Interface at
45 banging) designed to enable in-system programming, debugging, and
47 this code supports only flash programming but extensions are easy to
|
| /linux/drivers/misc/c2port/ |
| H A D | core.c | 497 /* Target the C2 flash programming control register for C2 data in __c2port_store_flash_access()
501 /* Write the first keycode to enable C2 Flash programming */ in __c2port_store_flash_access()
506 /* Write the second keycode to enable C2 Flash programming */ in __c2port_store_flash_access()
512 * C2 flash programming */ in __c2port_store_flash_access()
535 dev_err(c2dev->dev, "cannot enable %s flash programming\n", in c2port_store_flash_access()
550 /* Target the C2 flash programming data register for C2 data register in __c2port_write_flash_erase()
570 /* Read flash programming interface status */ in __c2port_write_flash_erase()
644 /* Target the C2 flash programming data register for C2 data register in __c2port_read_flash_data()
663 /* Read flash programming interface status */ in __c2port_read_flash_data()
695 /* Read flash programming interface status */ in __c2port_read_flash_data()
[all …]
|
| /linux/include/soc/at91/ |
| H A D | sama7-ddr.h | 73 #define UDDRC_SWCTRL (0x320) /* UDDRC Software Register Programming Control Enable */
74 #define UDDRC_SWCTRL_SW_DONE (1 << 0) /* Enable quasi-dynamic register programming outside reset …
76 #define UDDRC_SWSTAT (0x324) /* UDDRC Software Register Programming Control Status */
77 #define UDDRC_SWSTAT_SW_DONE_ACK (1 << 0) /* Register programming done */
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core_structs.h | 656 …/ <brief ODM mode that is chosen in the mode check stage and will be used in mode programming stage
663 /// @brief To control the clk usage for model programming
685 struct dml_hw_resource_st hw; //< brief for mode programming
686 struct dml_clk_cfg_st clk_overrides; //< brief for mode programming clk override
689 /// @brief DML mode evaluation and programming policy
690 /// Those knobs that affect mode support and mode programming
703 … support the given display configuration. User can tell use the output DCFCLK for mode programming.
725 …t immediate flip at the max combine setting; determine in mode support and used in mode programming
792 …/ <brief ODM mode that is chosen in the mode check stage and will be used in mode programming stage
821 // Physical info; only using for programming
[all …]
|
| /linux/drivers/fpga/tests/ |
| H A D | fpga-region-test.c | 62 * of programming cycles. The internals of the programming sequence are
114 * FPGA Region programming test. The Region must call get_bridges() to get
115 * and control the bridges, and then the Manager for the actual programming.
|
| /linux/drivers/ata/ |
| H A D | pata_optidma.c | 164 /* Commence primary programming sequence */ in optidma_mode_setup()
178 /* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */ in optidma_mode_setup()
184 /* Note: at this point our programming is incomplete. We are in optidma_mode_setup()
235 * DMA programming. The architecture of the Firestar makes it easier
250 * DMA programming. The architecture of the Firestar makes it easier
265 * DMA programming. The architecture of the Firestar makes it easier
280 * DMA programming. The architecture of the Firestar makes it easier
|
| /linux/Documentation/input/ |
| H A D | input_kapi.rst | 12 input-programming
13 gameport-programming
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | calxeda-combophy.yaml | 14 Programming the PHYs is typically handled by those device drivers,
31 description: device ID for programming the ComboPHY.
|
| /linux/tools/perf/Documentation/ |
| H A D | perf-list.txt | 99 section of the [AMD Processor Programming Reference (PPR)] relevant to the
102 Manual Volume 2: System Programming, 13.3 Instruction-Based
115 … and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide] Figure 3…
118 [AMD Processor Programming Reference (PPR)] relevant to the family, model
402 …Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide],
403 https://bugzilla.kernel.org/show_bug.cgi?id=206537[AMD Processor Programming Reference (PPR)]
|
| /linux/tools/testing/selftests/powerpc/pmu/event_code_tests/ |
| H A D | invalid_event_code_test.c | 23 * whereas in ISA v3.1, these are used for programming
26 * whereas it is used for programming "radix_scope_qual"
|
| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | metafmt-pisp-fe.rst | 20 provide detailed description of the Front End configuration and programming
39 provide detailed description of the Front End configuration and programming
|
| /linux/Documentation/trace/coresight/ |
| H A D | coresight-ect.rst | 30 The CTI driver enables the programming of the CTI to attach triggers to
38 programming registers in the CTI.
89 * ``channels``: Contains the channel API - CTI main programming interface.
189 * ``chan_xtrigs_reset``: Write 1 to clear all channel / trigger programming.
|
| H A D | coresight-config.rst | 14 programming of the CoreSight system with pre-defined configurations that
32 A feature is a named set of programming for a CoreSight device. The programming
61 parameter is used in programming the device.
|
| /linux/Documentation/driver-api/ |
| H A D | i2c.rst | 16 The Linux I2C programming interfaces support the master side of bus
17 interactions and the slave side. The programming interface is
|
| /linux/include/net/iucv/ |
| H A D | iucv.h | 19 * CP Programming Services book, also available on the web thru
25 * CP Programming Services book.
62 * and can be found in CP Programming Services.
136 * a parameter area as defined by the CP Programming Services and private
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | keystone-pll.txt | 46 - bit-mask : arbitrary bitmask for programming the mux
68 - bit-mask : arbitrary bitmask for programming the divider
|