Home
last modified time | relevance | path

Searched full:power (Results 1 – 25 of 5237) sorted by relevance

12345678910>>...210

/linux/Documentation/devicetree/bindings/power/
H A Drockchip,power-controller.yaml4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
7 title: Rockchip Power Domains
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
19 generic power domain providers documented in
20 Documentation/devicetree/bindings/power/power-domain.yaml.
22 IP cores belonging to a power domain should contain a
23 "power-domains" property that is a phandle for the
24 power domain node representing the domain.
[all …]
H A Dmediatek,power-controller.yaml4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
7 title: Mediatek Power Domains Controller
14 Mediatek processors include support for multiple power domains which can be
15 powered up/down by software based on different application scenes to save power.
17 IP cores belonging to a power domain should contain a 'power-domains'
22 pattern: '^power-controller(@[0-9a-f]+)?$'
26 - mediatek,mt6735-power-controller
27 - mediatek,mt6795-power-controller
28 - mediatek,mt6893-power-controller
29 - mediatek,mt8167-power-controller
[all …]
H A Dfsl,imx-gpcv2.yaml4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
7 title: Freescale i.MX General Power Controller v2
13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
14 Control (PGC) for various power domains.
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
19 described as subnodes of the power gating controller 'pgc' node.
21 IP cores belonging to a power domain should contain a 'power-domains'
46 description: list of power domains provided by this controller.
56 "power-domain@[0-9a-f]+$":
[all …]
H A Dpower-domain.yaml4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
16 used for power gating of selected IP blocks for power saving by reduced
25 \#power-domain-cells property in the PM domain provider node.
29 pattern: "^(power-controller|power-domain|performance-domain)([@-].*)?$"
37 power-domain provider. The idle state definitions are compatible with the
48 Phandles to the OPP tables of power domains that are capable of scaling
49 performance, provided by a power domain provider. If the provider provides
50 a single power domain only or all the power domains provided by the
54 "#power-domain-cells":
58 domains (e.g. power controllers), but can be any value as specified
[all …]
/linux/arch/arm64/boot/dts/apple/
H A Dt8112-pmgr.dtsi3 * PMGR Power domains for the Apple T8112 "M2" SoC
10 ps_sbr: power-controller@100 {
13 #power-domain-cells = <0>;
19 ps_aic: power-controller@108 {
22 #power-domain-cells = <0>;
28 ps_dwi: power-controller@110 {
31 #power-domain-cells = <0>;
37 ps_soc_spmi0: power-controller@118 {
40 #power-domain-cells = <0>;
45 ps_gpio: power-controller@120 {
[all …]
H A Dt8103-pmgr.dtsi3 * PMGR Power domains for the Apple T8103 "M1" SoC
10 ps_sbr: power-controller@100 {
13 #power-domain-cells = <0>;
19 ps_aic: power-controller@108 {
22 #power-domain-cells = <0>;
28 ps_dwi: power-controller@110 {
31 #power-domain-cells = <0>;
37 ps_soc_spmi0: power-controller@118 {
40 #power-domain-cells = <0>;
45 ps_soc_spmi1: power-controller@120 {
[all …]
H A Ds8001-pmgr.dtsi3 * PMGR Power domains for the Apple S8001 "A9X" SoC
9 ps_cpu0: power-controller@80000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@80008 {
21 #power-domain-cells = <0>;
27 ps_cpm: power-controller@80040 {
30 #power-domain-cells = <0>;
36 ps_sio_busif: power-controller@80148 {
39 #power-domain-cells = <0>;
44 ps_sio_p: power-controller@80150 {
[all …]
H A Ds5l8960x-pmgr.dtsi3 * PMGR Power domains for the Apple S5L8960X "A7" SoC
9 ps_cpu0: power-controller@20000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@20008 {
21 #power-domain-cells = <0>;
27 ps_secuart0: power-controller@200f0 {
30 #power-domain-cells = <0>;
33 power-domains = <&ps_sio_p>;
36 ps_secuart1: power-controller@200f8 {
39 #power-domain-cells = <0>;
[all …]
H A Dt8011-pmgr.dtsi3 * PMGR Power domains for the Apple T8011 "A10X" SoC
9 ps_cpu0: power-controller@80000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@80008 {
21 #power-domain-cells = <0>;
27 ps_cpu2: power-controller@80010 {
30 #power-domain-cells = <0>;
36 ps_cpm: power-controller@80040 {
39 #power-domain-cells = <0>;
45 ps_sio_busif: power-controller@80158 {
[all …]
H A Dt8015-pmgr.dtsi3 * PMGR Power domains for the Apple T8015 "A11" SoC
9 ps_cpu0: power-controller@80000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@80008 {
21 #power-domain-cells = <0>;
27 ps_cpu2: power-controller@80010 {
30 #power-domain-cells = <0>;
36 ps_cpu3: power-controller@80018 {
39 #power-domain-cells = <0>;
45 ps_cpu4: power-controller@80020 {
[all …]
H A Dt8010-pmgr.dtsi3 * PMGR Power domains for the Apple T8010 "A10" SoC
9 ps_cpu0: power-controller@80000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@80008 {
21 #power-domain-cells = <0>;
27 ps_cpm: power-controller@80040 {
30 #power-domain-cells = <0>;
36 ps_sio_busif: power-controller@80160 {
39 #power-domain-cells = <0>;
44 ps_sio_p: power-controller@80168 {
[all …]
H A Dt7001-pmgr.dtsi3 * PMGR Power domains for the Apple T7001 "A8X" SoC
9 ps_cpu0: power-controller@20000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@20008 {
21 #power-domain-cells = <0>;
27 ps_cpu2: power-controller@20010 {
30 #power-domain-cells = <0>;
36 ps_cpm: power-controller@20040 {
39 #power-domain-cells = <0>;
45 ps_sio_p: power-controller@201f8 {
[all …]
H A Dt8012-pmgr.dtsi3 * PMGR Power domains for the Apple T8012 "T2" SoC
9 ps_cpu0: power-controller@80000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@80008 {
21 #power-domain-cells = <0>;
27 ps_cpm: power-controller@80040 {
30 #power-domain-cells = <0>;
36 ps_sio_busif: power-controller@80158 {
39 #power-domain-cells = <0>;
44 ps_sio_p: power-controller@80160 {
[all …]
H A Dt600x-pmgr.dtsi3 * PMGR Power domains for the Apple T6001 "M1 Max" SoC
9 DIE_NODE(ps_pms_bridge): power-controller@100 {
12 #power-domain-cells = <0>;
18 DIE_NODE(ps_aic): power-controller@108 {
21 #power-domain-cells = <0>;
27 DIE_NODE(ps_dwi): power-controller@110 {
30 #power-domain-cells = <0>;
36 DIE_NODE(ps_pms): power-controller@118 {
39 #power-domain-cells = <0>;
45 DIE_NODE(ps_gpio): power-controller@120 {
[all …]
H A Dt7000-pmgr.dtsi3 * PMGR Power domains for the Apple T7000 "A8" SoC
8 ps_cpu0: power-controller@20000 {
11 #power-domain-cells = <0>;
17 ps_cpu1: power-controller@20008 {
20 #power-domain-cells = <0>;
26 ps_cpm: power-controller@20040 {
29 #power-domain-cells = <0>;
35 ps_sio_p: power-controller@201f8 {
38 #power-domain-cells = <0>;
43 ps_lio: power-controller@20100 {
[all …]
H A Ds800-0-3-pmgr.dtsi3 * PMGR Power domains for the Apple S8000/3 "A9" SoC
9 ps_cpu0: power-controller@80000 {
12 #power-domain-cells = <0>;
18 ps_cpu1: power-controller@80008 {
21 #power-domain-cells = <0>;
27 ps_cpm: power-controller@80040 {
30 #power-domain-cells = <0>;
36 ps_sio_busif: power-controller@80150 {
39 #power-domain-cells = <0>;
44 ps_sio_p: power-controller@80158 {
[all …]
/linux/drivers/base/power/
H A Druntime.c3 * drivers/base/power/runtime.c - Helper functions for device runtime PM
18 #include "power.h"
68 * update_pm_runtime_accounting - Update the time accounting of power states
71 * In order to be able to have time accounting of the various power states
82 if (dev->power.disable_depth > 0) in update_pm_runtime_accounting()
85 last = dev->power.accounting_timestamp; in update_pm_runtime_accounting()
88 dev->power.accounting_timestamp = now; in update_pm_runtime_accounting()
100 if (dev->power.runtime_status == RPM_SUSPENDED) in update_pm_runtime_accounting()
101 dev->power.suspended_time += delta; in update_pm_runtime_accounting()
103 dev->power.active_time += delta; in update_pm_runtime_accounting()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,imx8-acm.yaml26 power-domains:
48 - power-domains
62 power-domains:
64 - description: power domain of IMX_SC_R_AUDIO_CLK_0
65 - description: power domain of IMX_SC_R_AUDIO_CLK_1
66 - description: power domain of IMX_SC_R_MCLK_OUT_0
67 - description: power domain of IMX_SC_R_MCLK_OUT_1
68 - description: power domain of IMX_SC_R_AUDIO_PLL_0
69 - description: power domain of IMX_SC_R_AUDIO_PLL_1
70 - description: power domain of IMX_SC_R_ASRC_0
[all …]
/linux/drivers/staging/nvec/
H A Dnvec_power.c3 * nvec_power: power supply driver for a NVIDIA compliant embedded controller
87 struct nvec_power *power = in nvec_power_notifier() local
95 if (power->on != res->plu) { in nvec_power_notifier()
96 power->on = res->plu; in nvec_power_notifier()
109 static void get_bat_mfg_data(struct nvec_power *power) in get_bat_mfg_data() argument
116 nvec_write_async(power->nvec, buf, 2); in get_bat_mfg_data()
123 struct nvec_power *power = in nvec_power_bat_notifier() local
134 if (power->bat_present == 0) { in nvec_power_bat_notifier()
136 get_bat_mfg_data(power); in nvec_power_bat_notifier()
139 power->bat_present = 1; in nvec_power_bat_notifier()
[all …]
/linux/drivers/net/ipa/
H A Dipa_power.c23 * DOC: IPA Power Management
26 * interconnects (buses) it depends on are enabled. Runtime power
38 * struct ipa_power - IPA power management information
54 static int ipa_interconnect_init(struct ipa_power *power, in ipa_interconnect_init() argument
62 interconnect = &power->interconnect[0]; in ipa_interconnect_init()
63 for (i = 0; i < power->interconnect_count; i++) { in ipa_interconnect_init()
72 ret = of_icc_bulk_get(power->dev, power->interconnect_count, in ipa_interconnect_init()
73 power->interconnect); in ipa_interconnect_init()
78 icc_bulk_disable(power->interconnect_count, power->interconnect); in ipa_interconnect_init()
81 ret = icc_bulk_set_bw(power->interconnect_count, power->interconnect); in ipa_interconnect_init()
[all …]
/linux/Documentation/power/powercap/
H A Dpowercap.rst2 Power Capping Framework
5 The power capping framework provides a consistent interface between the kernel
6 and the user space that allows power capping drivers to expose the settings to
12 The framework exposes power capping devices to user space via sysfs in the
14 'control types', which correspond to different methods of power capping. For
16 Power Limit" (RAPL) technology, whereas the 'idle-injection' control type
17 corresponds to the use of idle injection for controlling power.
19 Power zones represent different parts of the system, which can be controlled and
20 monitored using the power capping method determined by the control type the
21 given zone belongs to. They each contain attributes for monitoring power, as
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-power1 What: /sys/power/
5 The /sys/power directory will contain files that will
6 provide a unified interface to the power management
9 What: /sys/power/state
13 The /sys/power/state file controls system sleep states.
15 labels, which may be "mem" (suspend), "standby" (power-on
24 What: /sys/power/mem_sleep
28 The /sys/power/mem_sleep file controls the operating mode of
32 to suspend the system (by writing "mem" to the /sys/power/state
42 What: /sys/power/disk
[all …]
H A Dsysfs-class-powercap6 The powercap/ class sub directory belongs to the power cap
8 Documentation/power/powercap/powercap.rst for details.
16 Here <control type> determines how the power is going to be
17 controlled. A <control type> can contain multiple power zones.
24 This allows to enable/disable power capping for a "control type".
25 This status affects every power zone using this "control_type.
27 What: /sys/class/powercap/<control type>/<power zone>
32 A power zone is a single or a collection of devices, which can
33 be independently monitored and controlled. A power zone sysfs
37 What: /sys/class/powercap/<control type>/<power zone>/<child power zone>
[all …]
/linux/drivers/pmdomain/bcm/
H A Dbcm2835-power.c3 * Power domain driver for Broadcom BCM2835
61 /* The power gates must be enabled with this bit before enabling the LDO in the
109 #define PM_READ(reg) readl(power->base + (reg))
110 #define PM_WRITE(reg, val) writel(PM_PASSWORD | (val), power->base + (reg))
133 struct bcm2835_power *power; member
152 static int bcm2835_asb_control(struct bcm2835_power *power, u32 reg, bool enable) in bcm2835_asb_control() argument
154 void __iomem *base = power->asb; in bcm2835_asb_control()
163 if (power->rpivid_asb) in bcm2835_asb_control()
164 base = power->rpivid_asb; in bcm2835_asb_control()
187 static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg) in bcm2835_asb_enable() argument
[all …]
/linux/Documentation/hwmon/
H A Docc.rst15 embedded on POWER processors. The OCC is a device that collects and aggregates
17 sensor data as well as perform thermal and power management on the system.
77 power[1-n]_input
78 Latest measured power reading of the component in
80 power[1-n]_average
81 Average power of the component in microwatts.
82 power[1-n]_average_interval
83 The amount of time over which the power average
86 [with power sensor version < 2]
88 power[1-n]_label
[all …]

12345678910>>...210