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/linux/include/video/
H A Dcirrus.h2 * drivers/video/clgenfb.h - Cirrus Logic chipset constants
14 * Format this code with GNU indent '-kr -i8 -pcs' options.
27 /* OLD COMMENT: for other CL-GD542x/543x based boards.. */
46 #define CL_SEQR10 0x10 /* Graphics Cursor X Position */
47 #define CL_SEQR11 0x11 /* Graphics Cursor Y Position */
48 #define CL_SEQR12 0x12 /* Graphics Cursor Attributes */
49 #define CL_SEQR13 0x13 /* Graphics Cursor Pattern Address Offset */
50 #define CL_SEQR14 0x14 /* Scratch Pad 2 (CL-GD5426/'28 Only) (do not access!) */
51 #define CL_SEQR15 0x15 /* Scratch Pad 3 (CL-GD5426/'28 Only) (do not access!) */
52 #define CL_SEQR16 0x16 /* Performance Tuning (CL-GD5424/'26/'28 Only) */
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/linux/Documentation/devicetree/bindings/phy/
H A Dapm,xgene-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/apm,xgene-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: APM X-Gene 15Gbps Multi-purpose PHY
10 - Khuong Dinh <khuong@os.amperecomputing.com>
13 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
19 - const: apm,xgene-phy
24 '#phy-cells':
32 apm,tx-eye-tuning:
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/linux/drivers/video/fbdev/
H A Dpm3fb.c2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
10 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
16 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
97 return fb_readl(par->v_regs + off); in PM3_READ_REG()
102 fb_writel(v, par->v_regs + off); in PM3_WRITE_REG()
151 int f, pre, post; in pm3fb_calculate_clock() local
158 for (post = 0; post < in pm3fb_calculate_clock()
613 pm3fb_cursor(struct fb_info * info,struct fb_cursor * cursor) pm3fb_cursor() argument
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H A Dgxt4500.c1 // SPDX-License-Identifier: GPL-2.0-only
106 /* Hardware cursor */
125 #define WAT_CMAP_OFFSET 0x4104 /* 4-bit value gets << 6 */
142 #define readreg(par, reg) readl((par)->regs + (reg))
143 #define writereg(par, reg, val) writel((val), (par)->regs + (reg))
154 int pll_pd1; /* first post-divisor */
155 int pll_pd2; /* second post-divisor */
186 /* Card-specific information */
203 * the LFSR sequence that comes N-1 places before the terminal value
242 /* only deal with range 5MHz - 300MHz */ in calc_pll()
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/linux/drivers/gpu/drm/meson/
H A Dmeson_vpp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 * DOC: Video Post Processing
18 * VPP Handles all the Post Processing after the Scanout from the VIU
19 * We handle the following post processings :
21 * - Postblend, Blends the OSD1 only
23 * - Vertical OSD Scaler for OSD1 only, we disable vertical scaler and
25 * - Intermediate FIFO with default Amlogic values
29 * - Preblend for video overlay pre-scaling
30 * - OSD2 support for cursor framebuffer
31 * - Video pre-scaling before postblend
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/linux/net/smc/
H A Dsmc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Shared Memory Communications over RDMA (SMC-R) and RoCE
141 u8 cons_curs_upd_req : 1; /* cursor update requested */
155 union smc_host_cursor { /* SMC cursor - an offset in an RMBE */
159 u32 count; /* cursor (= offset) part */
174 union smc_host_cursor prod; /* producer cursor */
175 union smc_host_cursor cons; /* consumer cursor,
198 struct smc_link *lnk; /* assigned SMC-R link */
212 * cursor update
221 /* prod crsr - confirmed by peer
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H A Dsmc_cdc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Shared Memory Communications over RDMA (SMC-R) and RoCE
31 struct smc_connection *conn = cdcpend->conn; in smc_cdc_tx_handler()
36 sndbuf_desc = conn->sndbuf_desc; in smc_cdc_tx_handler()
38 bh_lock_sock(&smc->sk); in smc_cdc_tx_handler()
40 diff = smc_curs_diff(sndbuf_desc->len, in smc_cdc_tx_handler()
41 &cdcpend->conn->tx_curs_fin, in smc_cdc_tx_handler()
42 &cdcpend->cursor); in smc_cdc_tx_handler()
45 atomic_add(diff, &cdcpend->conn->sndbuf_space); in smc_cdc_tx_handler()
46 /* guarantee 0 <= sndbuf_space <= sndbuf_desc->len */ in smc_cdc_tx_handler()
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/linux/include/linux/ceph/
H A Dmessenger.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/radix-tree.h>
79 * @cursor: data cursor for reading extents
83 * receive an extent into the current cursor position, and zeroing
87 * complete, or -errno if there was an error.
90 * the provided buffer. Otherwise, it should be read into the cursor.
92 * The sparse read operation is expected to initialize the cursor
96 struct ceph_msg_data_cursor *cursor,
141 BUG_ON(!(it)->iter.bi_size); \
142 __cur_n = min((it)->iter.bi_size, __n); \
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/linux/lib/
H A Dassoc_array.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * See Documentation/core-api/assoc_array.rst for information.
27 const struct assoc_array_ptr *cursor, *ptr, *parent; in assoc_array_subtree_iterate() local
31 cursor = root; in assoc_array_subtree_iterate()
34 if (assoc_array_ptr_is_shortcut(cursor)) { in assoc_array_subtree_iterate()
36 shortcut = assoc_array_ptr_to_shortcut(cursor); in assoc_array_subtree_iterate()
37 cursor = READ_ONCE(shortcut->next_node); /* Address dependency. */ in assoc_array_subtree_iterate()
40 node = assoc_array_ptr_to_node(cursor); in assoc_array_subtree_iterate()
52 ptr = READ_ONCE(node->slots[slot]); /* Address dependency. */ in assoc_array_subtree_iterate()
71 * a particular portion of the key space cannot change - and we in assoc_array_subtree_iterate()
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/linux/include/linux/
H A Dcgroup.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright (C) 2004-2006 Silicon Graphics, Inc.
29 #include <linux/cgroup-defs.h>
47 * that attempts to access what would be a 0-element array (i.e. sized
77 struct list_head iters_node; /* css_set->task_iters */
103 * cgroup_subsys_enabled - fast test on whether a subsys is enabled
110 * cgroup_subsys_on_dfl - fast test on whether a subsys is on default hierarchy
185 * css_for_each_child - iterate through children of a css
186 * @pos: the css * to use as the loop cursor
191 * If a subsystem synchronizes ->css_online() and the start of iteration, a
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/linux/net/sunrpc/xprtrdma/
H A Dfrwr_ops.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2003-2007 Network Appliance, Inc. All rights reserved.
11 * of arbitrarily-sized memory regions. This is the fastest and safest
32 * send lock, just as ->send_request does. This prevents frwr_map and
51 struct rpc_rdma_cid *cid = &mr->mr_cid; in frwr_cid_init()
53 cid->ci_queue_id = ep->re_attr.send_cq->res.id; in frwr_cid_init()
54 cid->ci_completion_id = mr->mr_ibmr->res.id; in frwr_cid_init()
59 if (mr->mr_device) { in frwr_mr_unmap()
61 ib_dma_unmap_sg(mr->mr_device, mr->mr_sg, mr->mr_nents, in frwr_mr_unmap()
62 mr->mr_dir); in frwr_mr_unmap()
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/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dcrtc.c2 * Copyright 1993-2003 NVIDIA, Corporation
59 NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index, in crtc_wr_cio_state()
60 crtcstate->CRTC[index]); in crtc_wr_cio_state()
66 struct drm_device *dev = crtc->dev; in nv_crtc_set_digital_vibrance()
67 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance()
69 regp->CRTC[NV_CIO_CRE_CSB] = nv_crtc->saturation = level; in nv_crtc_set_digital_vibrance()
70 if (nv_crtc->saturation && nv_gf4_disp_arch(crtc->dev)) { in nv_crtc_set_digital_vibrance()
71 regp->CRTC[NV_CIO_CRE_CSB] = 0x80; in nv_crtc_set_digital_vibrance()
72 regp->CRTC[NV_CIO_CRE_5B] = nv_crtc->saturation << 2; in nv_crtc_set_digital_vibrance()
81 struct drm_device *dev = crtc->dev; in nv_crtc_set_image_sharpening()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_crtc.c1 // SPDX-License-Identifier: MIT
43 struct drm_crtc *crtc = &acrtc->base; in amdgpu_dm_crtc_handle_vblank()
44 struct drm_device *dev = crtc->dev; in amdgpu_dm_crtc_handle_vblank()
49 spin_lock_irqsave(&dev->event_lock, flags); in amdgpu_dm_crtc_handle_vblank()
51 /* Send completion event for cursor-only commits */ in amdgpu_dm_crtc_handle_vblank()
52 if (acrtc->event && acrtc->pflip_status != AMDGPU_FLIP_SUBMITTED) { in amdgpu_dm_crtc_handle_vblank()
53 drm_crtc_send_vblank_event(crtc, acrtc->event); in amdgpu_dm_crtc_handle_vblank()
55 acrtc->event = NULL; in amdgpu_dm_crtc_handle_vblank()
58 spin_unlock_irqrestore(&dev->event_lock, flags); in amdgpu_dm_crtc_handle_vblank()
65 return crtc_state->active && drm_atomic_crtc_needs_modeset(crtc_state); in amdgpu_dm_crtc_modeset_required()
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/linux/tools/perf/util/
H A Dmachine.c1 // SPDX-License-Identifier: GPL-2.0
18 #include "mem-events.h"
19 #include "mem-info.h"
23 #include "synthetic-events.h"
37 #include "bpf-event.h"
40 #include "arm64-frame-pointer-unwind-support.h"
51 return map__dso(machine->vmlinux_map); in machine__kernel_dso()
57 machine->mmap_name = strdup("[kernel.kallsyms]"); in machine__set_mmap_name()
59 machine->mmap_name = strdup("[guest.kernel.kallsyms]"); in machine__set_mmap_name()
60 else if (asprintf(&machine->mmap_name, "[guest.kernel.kallsyms.%d]", in machine__set_mmap_name()
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/linux/Documentation/admin-guide/
H A Dspkguide.txt16 Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A
25 http://linux-speakup.org/. Speakup is a set of patches to the standard
72 acntsa -- Accent SA
73 acntpc -- Accent PC
74 apollo -- Apollo
75 audptr -- Audapter
76 bns -- Braille 'n Speak
77 dectlk -- DecTalk Express (old and new, db9 serial only)
78 decext -- DecTalk (old) External
79 dtlk -- DoubleTalk PC
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/linux/arch/x86/kernel/
H A Duprobes.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * User-space Probes (UProbes) for x86
5 * Copyright (C) IBM Corporation, 2008-2011
20 #include <asm/insn-eval.h>
24 /* Post-execution fixups. */
44 #define OPCODE1(insn) ((insn)->opcode.bytes[0])
45 #define OPCODE2(insn) ((insn)->opcode.bytes[1])
46 #define OPCODE3(insn) ((insn)->opcode.bytes[2])
47 #define MODRM_REG(insn) X86_MODRM_REG((insn)->modrm.value)
57 * Good-instruction tables for 32-bit apps. This is non-const and volatile
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/linux/drivers/gpu/drm/loongson/
H A Dlsdc_crtc.c1 // SPDX-License-Identifier: GPL-2.0+
25 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_soft_reset()
51 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_soft_reset()
77 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_enable()
88 drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name); in lsdc_crtc0_enable()
97 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_disable()
106 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_enable()
116 drm_warn(&ldev->base, "%s stall\n", lcrtc->base.name); in lsdc_crtc1_enable()
125 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc1_disable()
136 struct lsdc_device *ldev = lcrtc->ldev; in lsdc_crtc0_scan_pos()
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/linux/drivers/soc/fsl/qbman/
H A Dqman.c1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
47 /* Cache-inhibited register offsets */
68 /* Cache-enabled register offsets */
83 /* Cache-inhibited register offsets */
104 /* Cache-enabled register offsets */
121 * synchronisation for portal accesses and data-dependencies. Use of barrier()s
122 * or other order-preserving primitives simply degrade performance. Hence the
127 /* Cache-enabled ring access */
138 * ci == cache-inhibited portal register
139 * ce == cache-enabled portal register
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/linux/tools/include/linux/
H A Drbtree.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 See Documentation/core-api/rbtree.rst for documentation and samples.
34 #define rb_parent(r) ((struct rb_node *)((r)->__rb_parent_color & ~3))
39 #define RB_EMPTY_ROOT(root) (READ_ONCE((root)->rb_node) == NULL)
43 ((node)->__rb_parent_color == (unsigned long)(node))
45 ((node)->__rb_parent_color = (unsigned long)(node))
58 /* Postorder iteration - always visit the parent after its children */
69 node->__rb_parent_color = (unsigned long)parent; in rb_link_node()
70 node->rb_left = node->rb_right = NULL; in rb_link_node()
81 * rbtree_postorder_for_each_entry_safe - iterate in post-order over rb_root of
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/linux/kernel/sched/
H A Dext.c1 /* SPDX-License-Identifier: GPL-2.0 */
3 * BPF extensible scheduler class: Documentation/scheduler/sched-ext.rst
66 * tasks for the sub-sched being enabled. Use a global variable instead of a
67 * per-task field as all enables are serialized.
83 * interval is half of the shortest sch->watchdog_timeout.
114 * Non-NULL values are used for direct dispatch from enqueue path. A valid
143 s32 cursor; member
150 .cpu = -
629 nldsq_cursor_next_task(struct scx_dsq_list_node * cursor,struct scx_dispatch_q * dsq) nldsq_cursor_next_task() argument
673 nldsq_cursor_lost_task(struct scx_dsq_list_node * cursor,struct rq * rq,struct scx_dispatch_q * dsq,struct task_struct * p) nldsq_cursor_lost_task() argument
703 struct scx_dsq_list_node cursor; global() member
763 struct sched_ext_entity cursor; global() member
893 struct list_head *cursor = &iter->cursor.tasks_node; scx_task_iter_next() local
4162 struct scx_dsq_list_node cursor = INIT_DSQ_LIST_CURSOR(cursor, dsq, 0); reenq_user() local
5132 struct scx_dsq_list_node cursor = INIT_DSQ_LIST_CURSOR(cursor, donor_dsq, 0); bypass_lb_cpu() local
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c1 // SPDX-License-Identifier: MIT
47 hws->ctx
49 hws->regs->reg
51 dc->ctx->logger
56 hws->shifts->field_name, hws->masks->field_name
60 struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk; in dcn401_initialize_min_clocks()
62 clocks->dcfclk_deep_sleep_khz = DCN3_2_DCFCLK_DS_INIT_KHZ; in dcn401_initialize_min_clocks()
63 clocks->dcfclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dcfclk_mhz * 1000; in dcn401_initialize_min_clocks()
64 clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000; in dcn401_initialize_min_clocks()
65 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn401_initialize_min_clocks()
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/linux/Documentation/gpu/rfc/
H A Dcolor_pipeline.rst1 .. SPDX-License-Identifier: GPL-2.0
10 We would like to support pre-, and post-blending complex color
12 HW-supported HDR use-cases, as well as to provide support to
13 color-managed applications, such as video or image editors.
22 implemented in fixed-function HW and therefore much more power efficient than
27 fixed-function blocks and shaders/CPU must be seamless with no visible
34 The most widely supported use-cases regard HDR content, whether video or
39 Drivers will then program their fixed-function HW accordingly to map from a
42 When fixed-function HW is not available the compositor will assemble a shader to
48 closed-source compositor code such a vendor will tune their color management
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/linux/drivers/gpu/drm/ast/
H A Dast_drv.h14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
112 * Hardware cursor
246 return __AST_CHIP_GEN(ast->chip); in __ast_gen()
312 return __ast_read32(ast->regs, reg); in ast_read32()
317 __ast_write32(ast->regs, reg, val); in ast_write32()
322 return __ast_read8(ast->ioregs, reg); in ast_io_read8()
327 __ast_write8(ast->ioregs, reg, val); in ast_io_write8()
332 return __ast_read8_i(ast->ioregs, base, index); in ast_get_index_reg()
338 return __ast_read8_i_masked(ast->ioregs, base, index, preserve_mask); in ast_get_index_reg_mask()
343 __ast_write8_i(ast->ioregs, base, index, val); in ast_set_index_reg()
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_core.h1 /* SPDX-License-Identifier: MIT */
65 * fills out the pipe-config with the hw state.
194 * if we get a HPD irq from DP and a HPD irq from non-DP
195 * the non-DP HPD could block the workqueue on a mode config
198 * blocked behind the non-DP one.
256 /* cursor */
276 * protects * intel_crtc->wm.active and
277 * crtc_state->wm.need_postvbl_update.
302 /* Top level crtc-ish functions */
454 * this is only populated post Meteorlake
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/linux/fs/xfs/libxfs/
H A Dxfs_ialloc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2000-2002,2005 Silicon Graphics, Inc.
37 struct xfs_btree_cur *cur, /* btree cursor */ in xfs_inobt_lookup()
42 cur->bc_rec.i.ir_startino = ino; in xfs_inobt_lookup()
43 cur->bc_rec.i.ir_holemask = 0; in xfs_inobt_lookup()
44 cur->bc_rec.i.ir_count = 0; in xfs_inobt_lookup()
45 cur->bc_rec.i.ir_freecount = 0; in xfs_inobt_lookup()
46 cur->bc_re in xfs_inobt_lookup()
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