| /linux/sound/soc/codecs/ |
| H A D | cs35l56-sdw.c | 37 static int cs35l56_sdw_poll_mem_status(struct sdw_slave *peripheral, in cs35l56_sdw_poll_mem_status() argument
46 false, peripheral, CS35L56_SDW_MEM_ACCESS_STATUS); in cs35l56_sdw_poll_mem_status()
56 static int cs35l56_sdw_slow_read(struct sdw_slave *peripheral, unsigned int reg, in cs35l56_sdw_slow_read() argument
65 ret = cs35l56_sdw_poll_mem_status(peripheral, in cs35l56_sdw_slow_read()
69 dev_err(&peripheral->dev, "!CMD_IN_PROGRESS fail: %d\n", ret); in cs35l56_sdw_slow_read()
74 sdw_read_no_pm(peripheral, reg + i); in cs35l56_sdw_slow_read()
77 ret = cs35l56_sdw_poll_mem_status(peripheral, in cs35l56_sdw_slow_read()
81 dev_err(&peripheral->dev, "RDATA_RDY fail: %d\n", ret); in cs35l56_sdw_slow_read()
86 ret = sdw_nread_no_pm(peripheral, CS35L56_SDW_MEM_READ_DATA, in cs35l56_sdw_slow_read()
89 dev_err(&peripheral->dev, "Late read @%#x failed: %d\n", reg + i, ret); in cs35l56_sdw_slow_read()
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| H A D | cs42l42-sdw.c | 203 static int cs42l42_sdw_poll_status(struct sdw_slave *peripheral, u8 mask, u8 match) in cs42l42_sdw_poll_status() argument
210 false, peripheral, CS42L42_SDW_MEM_ACCESS_STATUS); in cs42l42_sdw_poll_status()
215 dev_err(&peripheral->dev, "MEM_ACCESS_STATUS & %#x for %#x fail: %d\n", in cs42l42_sdw_poll_status()
223 struct sdw_slave *peripheral = context; in cs42l42_sdw_read() local
229 ret = cs42l42_sdw_poll_status(peripheral, CS42L42_SDW_CMD_IN_PROGRESS, 0); in cs42l42_sdw_read()
233 ret = sdw_read_no_pm(peripheral, reg); in cs42l42_sdw_read()
235 dev_err(&peripheral->dev, "Failed to issue read @0x%x: %d\n", reg, ret); in cs42l42_sdw_read()
240 ret = sdw_read_no_pm(peripheral, CS42L42_SDW_MEM_ACCESS_STATUS); in cs42l42_sdw_read()
242 dev_err(&peripheral->dev, "Failed to read MEM_ACCESS_STATUS: %d\n", ret); in cs42l42_sdw_read()
254 ret = cs42l42_sdw_poll_status(peripheral, in cs42l42_sdw_read()
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| /linux/Documentation/driver-api/memory-devices/ |
| H A D | ti-gpmc.rst | 24 functioning of the peripheral, while peripheral has another set of
25 timings. To have peripheral work with gpmc, peripheral timings has to
27 translated depends on the connected peripheral. Also there is a
32 from gpmc peripheral timings. struct gpmc_device_timings fields has to
33 be updated with timings from the datasheet of the peripheral that is
34 connected to gpmc. A few of the peripheral timings can be fed either
37 happen that timing as specified by peripheral datasheet is not present
38 in timing structure, in this scenario, try to correlate peripheral
40 field as required by peripheral, educate generic timing routine to
42 Then there may be cases where peripheral datasheet doesn't mention
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | mipi-dsi-bus.txt | 15 The following assumes that only a single peripheral is connected to a DSI
34 conjunction with another DSI host to drive the same peripheral. Hardware
39 DSI peripheral
52 - reg: The virtual channel number of a DSI peripheral. Must be in the range
58 that the peripheral responds to.
59 - If the virtual channels that a peripheral responds to are consecutive, the
79 connected to this peripheral. Each DSI host's output endpoint can be linked to
80 an input endpoint of the DSI peripheral.
87 - (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus
89 - (4) is an example of a peripheral on a I2C control bus connected to a
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| /linux/drivers/usb/gadget/udc/ |
| H A D | Kconfig | 4 # (a) a peripheral controller, and
18 # USB Peripheral Controller Support
27 menu "USB Peripheral Controller"
47 tristate "LPC32XX USB Peripheral Controller"
81 tristate "Broadcom BCM63xx Peripheral Controller"
92 tristate "Freescale Highspeed USB DR Peripheral Controller"
106 tristate "Faraday FUSB300 USB Peripheral Controller"
112 tristate "Aeroflex Gaisler GRUSBDC USB Peripheral Controller Driver"
159 tristate "Renesas R8A66597 USB Peripheral Controller"
162 R8A66597 is a discrete USB host and peripheral controller chip that
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | pistachio-clock.txt | 4 Pistachio has four clock controllers (core clock, peripheral clock, peripheral
44 Peripheral clock controller:
47 The peripheral clock controller generates clocks for the DDR, ROM, and other
48 peripherals. The peripheral system clock ("periph_sys") generated by the core
49 clock controller is the input clock to the peripheral clock controller.
53 - reg: Must contain the base address and length of the peripheral clock
58 - clock-names: Must include "periph_sys", the peripheral system clock generated
71 Peripheral general control:
74 The peripheral general control block generates system interface clocks and
75 resets for various peripherals. It also contains miscellaneous peripheral
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| H A D | mvebu-gated-clock.txt | 4 peripheral clocks to be gated to save some power. The clock consumer
11 ID Clock Peripheral
28 ID Clock Peripheral
55 ID Clock Peripheral
82 ID Clock Peripheral
96 ID Clock Peripheral
123 ID Clock Peripheral
133 ID Clock Peripheral
149 22 pdma Peripheral DMA
156 ID Clock Peripheral
|
| H A D | st,stm32mp25-rcc.yaml | 107 - description: CK_SCMI_ICN_APB1 Peripheral bridge 1
108 - description: CK_SCMI_ICN_APB2 Peripheral bridge 2
109 - description: CK_SCMI_ICN_APB3 Peripheral bridge 3
110 - description: CK_SCMI_ICN_APB4 Peripheral bridge 4
111 - description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub
112 - description: CK_SCMI_TIMG1 Peripheral bridge for timer1
113 - description: CK_SCMI_TIMG2 Peripheral bridge for timer2
|
| /linux/drivers/rtc/ |
| H A D | rtc-meson.c | 66 struct regmap *peripheral; /* peripheral registers */ member
71 .name = "peripheral-registers",
84 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, 0); in meson_rtc_sclk_pulse()
86 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, in meson_rtc_sclk_pulse()
92 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, in meson_rtc_send_bit()
110 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN, 0); in meson_rtc_set_dir()
111 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0); in meson_rtc_set_dir()
113 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0); in meson_rtc_set_dir()
125 regmap_read(rtc->peripheral, RTC_ADDR1, &tmp); in meson_rtc_get_data()
139 regmap_update_bits(rtc->peripheral, RTC_ADDR0, val, 0); in meson_rtc_get_bus()
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | img,pdc-intc.txt | 27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
35 0-7: Peripheral interrupts
39 flags as follows (only 4 valid for peripheral interrupts):
74 <30 4 /* level */>, /* Peripheral 0 (RTC) */
75 <29 4 /* level */>, /* Peripheral 1 (IR) */
76 <31 4 /* level */>; /* Peripheral 2 (WDT) */
82 * An SoC peripheral that is wired through the PDC.
88 // Interrupt source Peripheral 0
89 interrupts = <0 /* Peripheral 0 (RTC) */
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-peripheral-props.yaml | 4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
13 need to be defined in the peripheral node because they are per-peripheral and
123 - $ref: arm,pl022-peripheral-props.yaml#
124 - $ref: cdns,qspi-nor-peripheral-props.yaml#
125 - $ref: fsl,dspi-peripheral-props.yaml#
126 - $ref: samsung,spi-peripheral-props.yaml#
127 - $ref: nvidia,tegra210-quad-peripheral-props.yaml#
|
| /linux/include/linux/mfd/ |
| H A D | sta2x11-mfd.h | 204 #define APBREG_PWAC 0x20 /* Peripheral Write Access Control reg */
205 #define APBREG_PRAC 0x40 /* Peripheral Read Access Control reg */
206 #define APBREG_PCG 0x60 /* Peripheral Clock Gating Reg */
207 #define APBREG_PUR 0x80 /* Peripheral Under Reset Reg */
208 #define APBREG_EMU_PCG 0xA0 /* Emulator Peripheral Clock Gating Reg */
216 #define APBREG_PWAC_SARAC 0x120 /* Peripheral Write Access Control reg */
217 #define APBREG_PRAC_SARAC 0x140 /* Peripheral Read Access Control reg */
218 #define APBREG_PCG_SARAC 0x160 /* Peripheral Clock Gating Reg */
219 #define APBREG_PUR_SARAC 0x180 /* Peripheral Under Reset Reg */
220 #define APBREG_EMU_PCG_SARAC 0x1A0 /* Emulator Peripheral Clock Gating Reg */
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| /linux/include/linux/platform_data/ |
| H A D | sh_mmcif.h | 16 * 1000 : Peripheral clock / 512
17 * 0111 : Peripheral clock / 256
18 * 0110 : Peripheral clock / 128
19 * 0101 : Peripheral clock / 64
20 * 0100 : Peripheral clock / 32
21 * 0011 : Peripheral clock / 16
22 * 0010 : Peripheral clock / 8
23 * 0001 : Peripheral clock / 4
24 * 0000 : Peripheral clock / 2
25 * 1111 : Peripheral clock (sup_pclk set '1')
|
| /linux/drivers/gpu/drm/ |
| H A D | drm_mipi_dsi.c | 242 * @dsi: DSI peripheral device
369 * @dsi: DSI peripheral
391 * @dsi: DSI peripheral
419 * @dsi: DSI peripheral
583 * mipi_dsi_shutdown_peripheral() - sends a Shutdown Peripheral command
584 * @dsi: DSI peripheral device
603 * mipi_dsi_turn_on_peripheral() - sends a Turn On Peripheral command
604 * @dsi: DSI peripheral device
626 * the payload in a long packet transmitted from the peripheral back to the
628 * @dsi: DSI peripheral device
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| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | samsung,sysmmu.yaml | 14 physical memory chunks visible as a contiguous region to DMA-capable peripheral
23 System MMUs are in many to one relation with peripheral devices, i.e. single
24 peripheral device might have multiple System MMUs (usually one for each bus
25 master), but one System MMU can handle transactions from only one peripheral
26 device. The relation between a System MMU and the peripheral device needs to be
27 defined in device node of the peripheral device.
37 For information on assigning System MMU controller to its peripheral devices,
|
| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mc-peripheral-props.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/mc-peripheral-props.yaml#
7 title: Peripheral-specific properties for a Memory Controller bus.
10 Many Memory Controllers need to add properties to peripheral devices.
13 to be defined in the peripheral node because they are per-peripheral
38 - $ref: intel,ixp4xx-expansion-peripheral-props.yaml#
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-platform-renesas_usb3 | 11 - "host" - switching mode from peripheral to host.
12 - "peripheral" - switching mode from host to peripheral.
17 - "peripheral" - The mode is peripheral now.
|
| H A D | sysfs-platform-phy-rcar-gen3-usb2 | 11 - "host" - switching mode from peripheral to host.
12 - "peripheral" - switching mode from host to peripheral.
17 - "peripheral" - The mode is peripheral now.
|
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | atmel-usb.txt | 10 - clocks: Should reference the peripheral, host and system clocks
12 "ohci_clk" for the peripheral clock
37 - clocks: Should reference the peripheral and the UTMI clocks
39 "ehci_clk" for the peripheral clock
64 - clocks: Should reference the peripheral and the AHB clocks
66 "pclk" for the peripheral clock
95 - clocks: Should reference the peripheral and host clocks
97 "pclk" for the peripheral clock
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | hix5hd2-phy.txt | 11 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
12 - hisilicon,power-reg: offset and bit number within peripheral-syscon,
20 hisilicon,peripheral-syscon = <&peripheral_ctrl>;
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| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | sharp,lq101r1sx01.yaml | 17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
19 peripheral and controls the device. The 'link2' property contains a phandle
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
49 phandle to the DSI peripheral on the secondary link. Note that the
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| H A D | jdi,lpm102a188a.yaml | 17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
18 driven by the first link (DSI-LINK1) is considered the primary peripheral
20 peripheral driven by the second link (DSI-LINK2).
43 phandle to the DSI peripheral on the secondary link. Note that the
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| /linux/Documentation/userspace-api/media/ |
| H A D | glossary.rst | 70 Hardware Peripheral
72 together make a larger user-facing functional peripheral. For
75 peripheral.
77 Also known as :term:`Peripheral`.
157 Peripheral
158 The same as :term:`Hardware Peripheral`.
172 **Serial Peripheral Interface Bus**
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| /linux/arch/powerpc/platforms/52xx/ |
| H A D | mpc52xx_pic.c | 25 * three groups called 'critical', 'main', and 'peripheral'. The critical
28 * gpios, and the general purpose timers. Peripheral group contains the
56 * bestcomm interrupt occurs (peripheral group, irq 0) this driver determines
470 * 'peripheral'. This function reads the status register and returns the IRQ
473 * then 'peripheral'.
476 * of individual 'peripheral' interrupts. If this is the case then a special
478 * or medium priority peripheral irq has occurred.
484 * bestcomm DMA task can raise the bestcomm peripheral interrupt. When this
496 if (irq == 2) /* high priority peripheral */ in mpc52xx_get_irq()
497 goto peripheral; in mpc52xx_get_irq()
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| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-atr.yaml | 27 addresses must be available, not used by any other peripheral. Each
28 remote peripheral is assigned an alias from the pool, and transactions to
29 that address will be forwarded to the remote peripheral, with the address
30 translated to the remote peripheral's real address. This property is not
|