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/linux/arch/m68k/include/asm/
H A Dmcf_pgtable.h10 * after masking from the pte.
99 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) in pte_modify() argument
101 pte_val(pte) = (pte_val(pte) & CF_PAGE_CHG_MASK) | pgprot_val(newprot); in pte_modify()
102 return pte; in pte_modify()
112 #define __pte_page(pte) ((void *) (pte_val(pte) & PAGE_MASK)) argument
115 static inline int pte_none(pte_t pte) in pte_none() argument
117 return !pte_val(pte); in pte_none()
120 static inline int pte_present(pte_t pte) in pte_present() argument
122 return pte_val(pte) & CF_PAGE_VALID; in pte_present()
131 #define pte_page(pte) virt_to_page(__pte_page(pte)) argument
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H A Dsun3_pgtable.h29 /* Page protection values within PTE. */
79 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) in pte_modify() argument
81 pte_val(pte) = (pte_val(pte) & SUN3_PAGE_CHG_MASK) | pgprot_val(newprot); in pte_modify()
82 return pte; in pte_modify()
87 #define __pte_page(pte) \ argument
88 (__va ((pte_val (pte) & SUN3_PAGE_PGNUM_MASK) << PAGE_SHIFT))
95 static inline int pte_none (pte_t pte) { return !pte_val (pte); } in pte_none() argument
96 static inline int pte_present (pte_t pte) { return pte_val (pte) & SUN3_PAGE_VALID; } in pte_present() argument
103 #define pte_pfn(pte) (pte_val(pte) & SUN3_PAGE_PGNUM_MASK) argument
107 #define pte_page(pte) virt_to_page(__pte_page(pte)) argument
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H A Dmotorola_pgtable.h84 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) in pte_modify() argument
86 pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); in pte_modify()
87 return pte; in pte_modify()
100 #define __pte_page(pte) ((unsigned long)__va(pte_val(pte) & PAGE_MASK)) argument
105 #define pte_none(pte) (!pte_val(pte)) argument
106 #define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE)) argument
110 #define pte_page(pte) virt_to_page(__va(pte_val(pte))) argument
111 #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) argument
135 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
146 static inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_RONLY); } in pte_write() argument
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/linux/arch/powerpc/include/asm/nohash/
H A Dpgtable.h37 static inline unsigned long pte_huge_size(pte_t pte) in pte_huge_size() argument
44 * PTE updates. This function is called whenever an existing
45 * valid PTE is updated. This does -not- include set_pte_at()
46 * which nowadays only sets a new PTE.
49 * and the PTE may be either 32 or 64 bit wide. In the later case,
50 * when using atomic updates, only the low part of the PTE is
140 /* Set the dirty and/or accessed bits atomically in a linux PTE */
157 /* Generic accessors to PTE bits */
159 static inline pte_t pte_mkwrite_novma(pte_t pte) in pte_mkwrite_novma() argument
164 return __pte(pte_val(pte) | _PAGE_RW); in pte_mkwrite_novma()
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/linux/arch/powerpc/include/asm/book3s/32/
H A Dpgtable.h21 #define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
22 #define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */
35 /* We never clear the high word of the pte */
53 * Location of the PFN in the PTE. Most 32-bit platforms use the same
111 /* Bits to mask out from a PMD to get to the PTE page */
120 * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus
125 * level has 2048 entries and the second level has 512 64-bit PTE entries.
209 * Bits in a linux-style PTE. These match the bits in the
210 * (hardware-defined) PowerPC PTE as closely as possible.
247 * PTE updates. This function is called whenever an existing
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/linux/arch/parisc/include/asm/
H A Dpgtable.h64 extern void __update_cache(pte_t pte);
79 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
104 * done to get usable bits out of the PTE) */
182 /* this defines the shift to the usable bits in the PTE it is set so
187 /* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
304 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } in pte_dirty() argument
305 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } in pte_young() argument
306 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } in pte_write() argument
307 static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } in pte_special() argument
309 static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; } in pte_mkclean() argument
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/linux/arch/loongarch/include/asm/
H A Dpgtable.h139 pr_err("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
287 #define pte_pfn(x) ((unsigned long)(((x).pte & _PFN_MASK) >> PFN_PTE_SHIFT))
336 pte_t pte; in mk_swap_pte() local
337 pte_val(pte) = ((type & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT) | (offset << __SWP_OFFSET_SHIFT); in mk_swap_pte()
338 return pte; in mk_swap_pte()
347 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) argument
350 static inline bool pte_swp_exclusive(pte_t pte) in pte_swp_exclusive() argument
352 return pte_val(pte) & _PAGE_SWP_EXCLUSIVE; in pte_swp_exclusive()
355 static inline pte_t pte_swp_mkexclusive(pte_t pte) in pte_swp_mkexclusive() argument
357 pte_val(pte) |= _PAGE_SWP_EXCLUSIVE; in pte_swp_mkexclusive()
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/linux/drivers/iommu/
H A Dio-pgtable-dart.c63 /* marks PTE as valid */
67 #define iopte_deref(pte, d) __va(iopte_to_paddr(pte, d)) argument
85 dart_iopte pte; in paddr_to_iopte() local
91 pte = paddr >> APPLE_DART2_PADDR_SHIFT; in paddr_to_iopte()
92 pte &= APPLE_DART2_PADDR_MASK; in paddr_to_iopte()
94 return pte; in paddr_to_iopte()
97 static phys_addr_t iopte_to_paddr(dart_iopte pte, in iopte_to_paddr() argument
103 return pte & APPLE_DART1_PADDR_MASK; in iopte_to_paddr()
106 paddr = pte & APPLE_DART2_PADDR_MASK; in iopte_to_paddr()
118 dart_iopte pte = prot; in dart_init_pte() local
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H A Dio-pgtable-arm-v7s.c78 /* PTE type bits: these are all mixed up with XN/PXN bits in most cases */
83 #define ARM_V7S_PTE_IS_VALID(pte) (((pte) & 0x3) != 0) argument
84 #define ARM_V7S_PTE_IS_TABLE(pte, lvl) \ argument
85 ((lvl) == 1 && (((pte) & 0x3) == ARM_V7S_PTE_TYPE_TABLE))
99 * a level 1 PTE vs. bits [11:4] at level 2. Thus we define the individual
100 * fields relative to that 8-bit block, plus a total shift relative to the PTE.
171 static bool arm_v7s_pte_is_cont(arm_v7s_iopte pte, int lvl);
184 static arm_v7s_iopte to_mtk_iopte(phys_addr_t paddr, arm_v7s_iopte pte) in to_mtk_iopte() argument
187 pte |= ARM_V7S_ATTR_MTK_PA_BIT32; in to_mtk_iopte()
189 pte |= ARM_V7S_ATTR_MTK_PA_BIT33; in to_mtk_iopte()
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/linux/arch/powerpc/kvm/
H A Dtrace_pr.h64 TP_PROTO(struct hpte_cache *pte),
65 TP_ARGS(pte),
77 __entry->host_vpn = pte->host_vpn;
78 __entry->pfn = pte->pfn;
79 __entry->eaddr = pte->pte.eaddr;
80 __entry->vpage = pte->pte.vpage;
81 __entry->raddr = pte->pte.raddr;
82 __entry->flags = (pte->pte.may_read ? 0x4 : 0) |
83 (pte->pte.may_write ? 0x2 : 0) |
84 (pte->pte.may_execute ? 0x1 : 0);
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H A Dbook3s_32_mmu.c70 struct kvmppc_pte *pte, bool data,
84 struct kvmppc_pte pte; in kvmppc_mmu_book3s_32_ea_to_vp() local
86 if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false)) in kvmppc_mmu_book3s_32_ea_to_vp()
87 return pte.vpage; in kvmppc_mmu_book3s_32_ea_to_vp()
128 struct kvmppc_pte *pte, bool data, in kvmppc_mmu_book3s_32_xlate_bat() argument
160 pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid; in kvmppc_mmu_book3s_32_xlate_bat()
162 pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask); in kvmppc_mmu_book3s_32_xlate_bat()
163 pte->may_read = bat->pp; in kvmppc_mmu_book3s_32_xlate_bat()
164 pte->may_write = bat->pp > 1; in kvmppc_mmu_book3s_32_xlate_bat()
165 pte->may_execute = true; in kvmppc_mmu_book3s_32_xlate_bat()
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H A Dbook3s_pr_papr.c92 unsigned long pte[2]; in kvmppc_h_pr_remove() local
98 if (copy_from_user(pte, (void __user *)pteg, sizeof(pte))) in kvmppc_h_pr_remove()
100 pte[0] = be64_to_cpu((__force __be64)pte[0]); in kvmppc_h_pr_remove()
101 pte[1] = be64_to_cpu((__force __be64)pte[1]); in kvmppc_h_pr_remove()
104 if ((pte[0] & HPTE_V_VALID) == 0 || in kvmppc_h_pr_remove()
105 ((flags & H_AVPN) && (pte[0] & ~0x7fUL) != avpn) || in kvmppc_h_pr_remove()
106 ((flags & H_ANDCOND) && (pte[0] & avpn) != 0)) in kvmppc_h_pr_remove()
113 rb = compute_tlbie_rb(pte[0], pte[1], pte_index); in kvmppc_h_pr_remove()
117 kvmppc_set_gpr(vcpu, 4, pte[0]); in kvmppc_h_pr_remove()
118 kvmppc_set_gpr(vcpu, 5, pte[1]); in kvmppc_h_pr_remove()
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H A Dbook3s_64_mmu_radix.c22 #include <asm/pte-walk.h>
149 u64 pte, base, gpa; in kvmppc_mmu_walk_radix_tree() local
187 pte = __be64_to_cpu(rpte); in kvmppc_mmu_walk_radix_tree()
188 if (!(pte & _PAGE_PRESENT)) in kvmppc_mmu_walk_radix_tree()
191 if (pte & _PAGE_PTE) in kvmppc_mmu_walk_radix_tree()
194 base = pte & RPDB_MASK; in kvmppc_mmu_walk_radix_tree()
195 bits = pte & RPDS_MASK; in kvmppc_mmu_walk_radix_tree()
202 /* We found a valid leaf PTE */ in kvmppc_mmu_walk_radix_tree()
204 gpa = pte & 0x01fffffffffff000ul; in kvmppc_mmu_walk_radix_tree()
218 gpte->may_read = !!(pte & _PAGE_READ); in kvmppc_mmu_walk_radix_tree()
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/linux/arch/arm/include/asm/
H A Dpgalloc.h41 #define pud_populate(mm,pmd,pte) do { } while (0) argument
43 #define pud_populate(mm,pmd,pte) BUG() argument
50 static inline void clean_pte_table(pte_t *pte) in clean_pte_table() argument
52 clean_dcache_area(pte + PTE_HWTABLE_PTRS, PTE_HWTABLE_SIZE); in clean_pte_table()
56 * Allocate one PTE table.
58 * This actually allocates two hardware PTE tables, but we wrap this up
80 pte_t *pte = __pte_alloc_one_kernel(mm); in pte_alloc_one_kernel() local
82 if (pte) in pte_alloc_one_kernel()
83 clean_pte_table(pte); in pte_alloc_one_kernel()
85 return pte; in pte_alloc_one_kernel()
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/linux/arch/arm64/mm/
H A Dhugetlbpage.c25 * | Page Size | CONT PTE | PMD | CONT PMD | PUD |
130 pte_t pte = __ptep_get(ptep); in huge_ptep_get() local
132 if (pte_dirty(pte)) in huge_ptep_get()
135 if (pte_young(pte)) in huge_ptep_get()
155 pte_t pte, tmp_pte; in get_clear_contig() local
158 pte = __ptep_get_and_clear_anysz(mm, addr, ptep, pgsize); in get_clear_contig()
159 present = pte_present(pte); in get_clear_contig()
166 pte = pte_mkdirty(pte); in get_clear_contig()
168 pte = pte_mkyoung(pte); in get_clear_contig()
171 return pte; in get_clear_contig()
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/linux/arch/parisc/kernel/
H A Dentry.S380 /* Look up a PTE in a 2-Level scheme (faulting at each
386 .macro L2_ptep pmd,pte,index,va,fault
394 copy %r0,\pte
402 shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd /* pmd is now pte */
405 /* Look up PTE in a 3-Level scheme. */
406 .macro L3_ptep pgd,pte,index,va,fault
408 copy %r0,\pte
414 L2_ptep \pgd,\pte,\index,\va,\fault
418 .macro ptl_lock spc,ptp,pte,tmp,tmp1,fault
425 LDREG 0(\ptp),\pte
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/linux/arch/x86/kernel/
H A Dhead32.c42 *pl2p = (pte_t){ .pte = 0 }; in zap_early_initrd_mapping()
45 *(pl2p + ((PAGE_OFFSET >> PGDIR_SHIFT))) = (pte_t) {.pte = 0}; in zap_early_initrd_mapping()
92 * to the first kernel PMD. Note the upper half of each PMD or PTE are
105 static __init __no_stack_protector pte_t init_map(pte_t pte, pte_t **ptep, pl2_t **pl2p, in init_map() argument
108 while ((pte.pte & PTE_PFN_MASK) < limit) { in init_map()
119 **ptep = pte; in init_map()
120 pte.pte += PAGE_SIZE; in init_map()
125 return pte; in init_map()
132 pte_t pte, *ptep = (pte_t *)__pa_nodebug(__brk_base); in mk_early_pgtbl_32() local
137 pte.pte = PTE_IDENT_ATTR; in mk_early_pgtbl_32()
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/linux/arch/powerpc/mm/book3s32/
H A Dhash_low.S31 #define PTE_FLAGS_OFFSET 4 /* offset of PTE flags, in bytes */
38 * Load a PTE into the hash table, if possible.
46 * mapping for the address. Otherwise it places an appropriate PTE
67 /* Get PTE (linux-style) and check access */
85 rlwinm. r8,r8,0,0,19 /* extract address of pte page */
103 rlwimi r8,r4,23,20,28 /* compute pte address */
112 * Update the linux PTE atomically. We do the lwarx up-front
115 * to update the PTE to set _PAGE_HASHPTE. -- paulus.
118 lwarx r6,0,r8 /* get linux-style pte, flag word */
141 lwzx r10,r6,r10 /* Get upper PTE word */
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/linux/arch/arc/include/asm/
H A Dpgtable-bits-arcv2.h27 #define _PAGE_PRESENT (1 << 9) /* PTE/TLB Valid (H) */
60 * Mapping of vm_flags (Generic VM) to PTE flags (arch specific)
80 #define pte_write(pte) (pte_val(pte) & _PAGE_WRITE) argument
81 #define pte_dirty(pte) (pte_val(pte) & _PAGE_DIRTY) argument
82 #define pte_young(pte) (pte_val(pte) & _PAGE_ACCESSED) argument
83 #define pte_special(pte) (pte_val(pte) & _PAGE_SPECIAL) argument
86 static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
98 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) in pte_modify() argument
100 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); in pte_modify()
126 /* Decode a PTE containing swap "identifier "into constituents */
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/linux/include/trace/events/
H A Dthp.h14 TP_PROTO(unsigned long addr, unsigned long pte),
15 TP_ARGS(addr, pte),
18 __field(unsigned long, pte)
23 __entry->pte = pte;
26 TP_printk("Set page table entry with 0x%lx with 0x%lx", __entry->addr, __entry->pte)
41 TP_PROTO(unsigned long addr, unsigned long pte, unsigned long clr, unsigned long set),
42 TP_ARGS(addr, pte, clr, set),
45 __field(unsigned long, pte)
52 __entry->pte = pte;
58 …_printk("hugepage update at addr 0x%lx and pte = 0x%lx clr = 0x%lx, set = 0x%lx", __entry->addr, _…
/linux/arch/csky/include/asm/
H A Dpgalloc.h14 pte_t *pte) in pmd_populate_kernel() argument
16 set_pmd(pmd, __pmd(__pa(pte))); in pmd_populate_kernel()
20 pgtable_t pte) in pmd_populate() argument
22 set_pmd(pmd, __pmd(__pa(page_address(pte)))); in pmd_populate()
29 pte_t *pte; in pte_alloc_one_kernel() local
32 pte = __pte_alloc_one_kernel(mm); in pte_alloc_one_kernel()
33 if (!pte) in pte_alloc_one_kernel()
37 (pte + i)->pte_low = _PAGE_GLOBAL; in pte_alloc_one_kernel()
39 return pte; in pte_alloc_one_kernel()
64 #define __pte_free_tlb(tlb, pte, address) \ argument
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/linux/mm/
H A Dmapping_dirty_helpers.c13 * @tlbflush_start: Address of first modified pte
14 * @tlbflush_end: Address of last modified pte + 1
25 * wp_pte - Write-protect a pte
26 * @pte: Pointer to the pte
31 * The function write-protects a pte and records the range in
34 static int wp_pte(pte_t *pte, unsigned long addr, unsigned long end, in wp_pte() argument
38 pte_t ptent = ptep_get(pte); in wp_pte()
41 pte_t old_pte = ptep_modify_prot_start(walk->vma, addr, pte); in wp_pte()
44 ptep_modify_prot_commit(walk->vma, addr, pte, old_pt in wp_pte()
89 clean_record_pte(pte_t * pte,unsigned long addr,unsigned long end,struct mm_walk * walk) clean_record_pte() argument
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/linux/arch/arm64/kvm/hyp/
H A Dpgtable.c74 static bool kvm_pte_table(kvm_pte_t pte, s8 level) in kvm_pte_table() argument
79 if (!kvm_pte_valid(pte)) in kvm_pte_table()
82 return FIELD_GET(KVM_PTE_TYPE, pte) == KVM_PTE_TYPE_TABLE; in kvm_pte_table()
85 static kvm_pte_t *kvm_pte_follow(kvm_pte_t pte, struct kvm_pgtable_mm_ops *mm_ops) in kvm_pte_follow() argument
87 return mm_ops->phys_to_virt(kvm_pte_to_phys(pte)); in kvm_pte_follow()
97 kvm_pte_t pte = kvm_phys_to_pte(mm_ops->virt_to_phys(childp)); in kvm_init_table_pte() local
99 pte |= FIELD_PREP(KVM_PTE_TYPE, KVM_PTE_TYPE_TABLE); in kvm_init_table_pte()
100 pte |= KVM_PTE_VALID; in kvm_init_table_pte()
101 return pte; in kvm_init_table_pte()
106 kvm_pte_t pte = kvm_phys_to_pte(pa); in kvm_init_valid_leaf_pte() local
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/linux/arch/arc/mm/
H A Dtlbex.S10 * helps avoid a shift when preparing PD0 from PTE
158 ; OUT: r0 = PTE faulted on, r1 = ptr to PTE, r2 = Faulting V-address
197 bnz.d 2f ; YES: PGD == PMD has THP PTE: stop pgd walk
203 ; Get the PTE entry: The idea is
217 ld.aw r0, [r1, r0] ; r0: PTE (lower word only for PAE40)
218 ; r1: PTE ptr
225 ; Convert Linux PTE entry into TLB entry
226 ; A one-word PTE entry is programmed as two-word TLB Entry [PD0:PD1] in mmu
227 ; (for PAE40, two-words PTE, while three-word TLB Entry [PD0:PD1:PD1HI])
228 ; IN: r0 = PTE, r1 = ptr to PTE
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/linux/arch/sh/include/asm/
H A Dpgtable_32.h38 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
300 static inline void set_pte(pte_t *ptep, pte_t pte) in set_pte() argument
302 ptep->pte_high = pte.pte_high; in set_pte()
304 ptep->pte_low = pte.pte_low; in set_pte()
339 #define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT)) argument
340 #define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) argument
341 #define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) argument
342 #define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL) argument
345 #define pte_write(pte) \ argument
346 ((pte).pte_high & (_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE))
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