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/linux/Documentation/devicetree/bindings/clock/
H A Dstericsson,u8500-clks.yaml17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
37 prcmu-clock:
38 description: A subnode with one clock cell for PRCMU (power, reset, control
39 management unit) clocks. The cell indicates which PRCMU clock in the
40 prcmu-clock node the consumer wants to use.
114 output clocks. These are two PRCMU-internal clocks that can be divided and
134 - prcmu-clock
151 prcmu_clk: prcmu-clock {
/linux/drivers/clocksource/
H A Dclksrc-dbx500-prcmu.c10 * DBx500-PRCMU Timer
11 * The PRCMU has 5 timers which are available in a always-on
45 .name = "dbx500-prcmu-timer",
59 * The PRCMU should configure it but if it for some reason in clksrc_dbx500_prcmu_init()
71 TIMER_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
/linux/drivers/cpuidle/
H A Dcpuidle-ux500.c14 #include <linux/mfd/dbx500-prcmu.h>
52 /* The prcmu will be in charge of watching the interrupts in ux500_enter_idle()
62 /* ... and the prcmu */ in ux500_enter_idle()
66 /* Go to the retention state, the prcmu will wait for the in ux500_enter_idle()
72 /* When we switch to retention, the prcmu is in charge in ux500_enter_idle()
/linux/drivers/thermal/
H A Ddb8500_thermal.c13 #include <linux/mfd/dbx500-prcmu.h>
67 * TODO: There is no PRCMU interface to get temperature data currently, in db8500_thermal_get_temp()
69 * and this will be fixed when the PRCMU interface is available. in db8500_thermal_get_temp()
91 * The PRCMU accept absolute temperatures in celsius so divide in db8500_thermal_update_config()
119 "PRCMU set max %ld, min %ld\n", next_high, next_low); in prcmu_low_irq_handler()
141 "PRCMU set max %ld, min %ld\n", next_high, next_low); in prcmu_high_irq_handler()
/linux/arch/arm/mach-ux500/
H A Dpm.c44 /* This function decouple the gic from the prcmu */
62 /* This function recouple the gic with the prcmu */
106 * prcmu which has been delegated to monitor the irqs with the
137 * This function copies the gic SPI settings to the prcmu in order to
182 pr_err("could not remap PRCMU for PM functions\n"); in ux500_pm_init()
H A Dcpu-db8500.c15 #include <linux/mfd/dbx500-prcmu.h>
85 np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu"); in ux500_init_irq()
89 pr_err("could not find PRCMU base resource\n"); in ux500_init_irq()
/linux/drivers/mfd/
H A Ddb8500-prcmu.c35 #include <linux/mfd/dbx500-prcmu.h>
37 #include <linux/regulator/db8500-prcmu.h>
39 #include "db8500-prcmu-regs.h"
272 * communication with the PRCMU firmware.
877 pr_err("prcmu: Bad clock divider %d in %s\n", in request_even_slower_clocks()
1117 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in db8500_prcmu_set_epod()
1211 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in request_sysclk()
2118 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in prcmu_abb_read()
2168 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in prcmu_abb_write_masked()
2228 pr_crit("prcmu: %s timed out (5 s) waiting for a reply.\n", in prcmu_ac_wake_req()
[all …]
H A Ddb8500-prcmu-regs.h114 /* PRCMU clock/PLL/reset registers */
183 /* PRCMU HW semaphore */
/linux/drivers/regulator/
H A Ddb8500-prcmu.c16 #include <linux/mfd/dbx500-prcmu.h>
19 #include <linux/regulator/db8500-prcmu.h>
23 #include "dbx500-prcmu.h"
155 "regulator-switch-%s-enable: prcmu call failed\n", in db8500_regulator_switch_enable()
179 "regulator_switch-%s-disable: prcmu call failed\n", in db8500_regulator_switch_disable()
479 .name = "db8500-prcmu-regulators",
H A Dab8500.c117 AB8505_VSAFEREGU, /* NOTE! PRCMU register */
128 AB8505_VSAFESEL1, /* NOTE! PRCMU register */
129 AB8505_VSAFESEL2, /* NOTE! PRCMU register */
130 AB8505_VSAFESEL3, /* NOTE! PRCMU register */
1277 * 0x03, VpllRegu (NOTE! PRCMU register bits)
1487 * 0x03, VpllRegu (NOTE! PRCMU register bits)
H A DMakefile49 obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o
50 obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
H A Ddbx500-prcmu.c19 #include "dbx500-prcmu.h"
/linux/include/linux/mfd/
H A Ddbx500-prcmu.h5 * STE Ux500 PRCMU API
14 #include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
20 /* PRCMU Wakeup defines */
99 * enum prcmu_wdog_id - PRCMU watchdog IDs
212 #include <linux/mfd/db8500-prcmu.h>
553 /* PRCMU QoS APE OPP class */
H A Ddb8500-prcmu.h8 * PRCMU f/w APIs
27 /* This portion previously known as <mach/prcmu-fw-defs_v1.h> */
117 * enum ap_pwrst - current power states defined in PRCMU firmware
137 * enum ap_pwrst_trans - Transition states defined in PRCMU firmware
433 /* End of file previously known as prcmu-fw-defs_v1.h */
/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0.dtsi10 #include <dt-bindings/mfd/dbx500-prcmu.h>
72 * PRCMU for temperature and the cpufreq driver for passive
361 prcmu_clk: prcmu-clock {
565 prcm = <&prcmu>;
618 prcmu: prcmu@80157000 { label
619 compatible = "stericsson,db8500-prcmu", "syscon";
621 reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
629 prcmu-timer-4@80157450 {
630 compatible = "stericsson,db8500-prcmu-timer-4";
637 interrupt-parent = <&prcmu>;
[all …]
/linux/drivers/gpu/drm/mcde/
H A Dmcde_dsi.c32 /* PRCMU DSI reset registers */
54 struct regmap *prcmu; member
903 /* Assert RESET through the PRCMU, active low */ in mcde_dsi_enable()
905 regmap_update_bits(d->prcmu, PRCM_DSI_SW_RESET, in mcde_dsi_enable()
911 regmap_update_bits(d->prcmu, PRCM_DSI_SW_RESET, in mcde_dsi_enable()
1159 regmap_update_bits(d->prcmu, PRCM_DSI_SW_RESET, in mcde_dsi_unbind()
1182 /* Get a handle on the PRCMU so we can do reset */ in mcde_dsi_probe()
1183 d->prcmu = in mcde_dsi_probe()
1184 syscon_regmap_lookup_by_compatible("stericsson,db8500-prcmu"); in mcde_dsi_probe()
1185 if (IS_ERR(d->prcmu)) { in mcde_dsi_probe()
[all …]
/linux/drivers/clk/ux500/
H A Dclk-prcmu.c3 * PRCMU clock implementation for ux500 platform.
10 #include <linux/mfd/dbx500-prcmu.h>
32 /* PRCMU clock operations. */
H A DMakefile8 obj-y += clk-prcmu.o
H A Du8500_of_clk.c12 #include <linux/mfd/dbx500-prcmu.h>
184 /* PRCMU clocks */ in u8500_clk_init()
595 if (of_node_name_eq(child, "prcmu-clock")) in u8500_clk_init()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dste,nomadik.txt8 - prcm: phandle to the PRCMU managing the back end of this pin controller
80 prcm = <&prcmu>;
/linux/Documentation/devicetree/bindings/timer/
H A Dst,nomadik-mtu.yaml50 #include <dt-bindings/mfd/dbx500-prcmu.h>
/linux/Documentation/devicetree/bindings/thermal/
H A Ddb8500-thermal.txt7 - interrupts : interrupts generated from PRCMU;
/linux/include/dt-bindings/mfd/
H A Ddbx500-prcmu.h3 * This header provides constants for the PRCMU bindings.
/linux/drivers/watchdog/
H A Ddb8500_wdt.c19 #include <linux/mfd/dbx500-prcmu.h>
/linux/Documentation/devicetree/bindings/display/
H A Dste,mcde.yaml112 #include <dt-bindings/mfd/dbx500-prcmu.h>

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