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/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_hal.h170 void wlc_phy_detach(struct brcms_phy_pub *ppi);
177 void wlc_phy_hw_clk_state_upd(struct brcms_phy_pub *ppi, bool newstate);
178 void wlc_phy_hw_state_upd(struct brcms_phy_pub *ppi, bool newstate);
179 void wlc_phy_init(struct brcms_phy_pub *ppi, u16 chanspec);
180 void wlc_phy_watchdog(struct brcms_phy_pub *ppi);
181 int wlc_phy_down(struct brcms_phy_pub *ppi);
183 void wlc_phy_cal_init(struct brcms_phy_pub *ppi);
184 void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init);
186 void wlc_phy_chanspec_set(struct brcms_phy_pub *ppi, u16 chanspec);
187 u16 wlc_phy_chanspec_get(struct brcms_phy_pub *ppi);
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H A Dphy_cmn.c688 void wlc_phy_por_inform(struct brcms_phy_pub *ppi) in wlc_phy_por_inform() argument
690 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_phy_por_inform()
1139 u16 wlc_phy_bw_state_get(struct brcms_phy_pub *ppi) in wlc_phy_bw_state_get() argument
1141 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_phy_bw_state_get()
1146 void wlc_phy_bw_state_set(struct brcms_phy_pub *ppi, u16 bw) in wlc_phy_bw_state_set() argument
1148 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_phy_bw_state_set()
1153 void wlc_phy_chanspec_radio_set(struct brcms_phy_pub *ppi, u16 newch) in wlc_phy_chanspec_radio_set() argument
1155 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_phy_chanspec_radio_set()
1160 u16 wlc_phy_chanspec_get(struct brcms_phy_pub *ppi) in wlc_phy_chanspec_get() argument
1162 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_phy_chanspec_get()
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/linux/drivers/gpio/
H A Dgpio-104-dio-48e.c195 "PPI Group 0 Port A 0", "PPI Group 0 Port A 1", "PPI Group 0 Port A 2",
196 "PPI Group 0 Port A 3", "PPI Group 0 Port A 4", "PPI Group 0 Port A 5",
197 "PPI Group 0 Port A 6", "PPI Group 0 Port A 7", "PPI Group 0 Port B 0",
198 "PPI Group 0 Port B 1", "PPI Group 0 Port B 2", "PPI Group 0 Port B 3",
199 "PPI Group 0 Port B 4", "PPI Group 0 Port B 5", "PPI Group 0 Port B 6",
200 "PPI Group 0 Port B 7", "PPI Group 0 Port C 0", "PPI Group 0 Port C 1",
201 "PPI Group 0 Port C 2", "PPI Group 0 Port C 3", "PPI Group 0 Port C 4",
202 "PPI Group 0 Port C 5", "PPI Group 0 Port C 6", "PPI Group 0 Port C 7",
203 "PPI Group 1 Port A 0", "PPI Group 1 Port A 1", "PPI Group 1 Port A 2",
204 "PPI Group 1 Port A 3", "PPI Group 1 Port A 4", "PPI Group 1 Port A 5",
[all …]
H A Dgpio-i8255.c74 const unsigned int ppi = offset / I8255_NGPIO; in i8255_reg_mask_xlate() local
81 *reg = base + stride + ppi * 4; in i8255_reg_mask_xlate()
85 *reg = base + ppi * 4; in i8255_reg_mask_xlate()
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-ppi1 What: /sys/class/tpm/tpmX/ppi/
6 This folder includes the attributes related with PPI (Physical
9 'find /sys/ -name 'pcrs''. For the detail information of PPI,
10 please refer to the PPI specification from
14 In Linux 4.2 ppi was moved to the character device directory.
15 A symlink from tpmX/device/ppi to tpmX/ppi to provide backwards
18 What: /sys/class/tpm/tpmX/ppi/version
22 This attribute shows the version of the PPI supported by the
26 What: /sys/class/tpm/tpmX/ppi/request
36 What: /sys/class/tpm/tpmX/ppi/response
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/linux/drivers/comedi/drivers/
H A Damplc_dio200_pci.c32 * 0 PPI-X PPI-X PPI-X
33 * 1 PPI-Y UNUSED UNUSED
34 * 2 CTR-Z1 PPI-Y UNUSED
45 * 0 PPI-X PPI-X1
46 * 1 PPI-Y PPI-X2
47 * 2 PPI-Z PPI-Y1
48 * 3 INTERRUPT PPI-Y2
54 * Each PPI is a 8255 chip providing 24 DIO channels. The DIO channels
174 * 0 PPI-X-C0 PPI-X-C0 PPI-X-C0
175 * 1 PPI-X-C3 PPI-X-C3 PPI-X-C3
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H A Damplc_dio200.c34 * 0 PPI-X PPI-X PPI-X
35 * 1 CTR-Y1 PPI-Y PPI-Y
44 * 0 CTR-X1 PPI-X
45 * 1 CTR-X2 PPI-Y
46 * 2 CTR-Y1 PPI-Z
52 * Each PPI is a 8255 chip providing 24 DIO channels. The DIO channels
141 * 0 PPI-X-C0 JUMPER-J5 PPI-X-C0
142 * 1 PPI-X-C3 PPI-X-C3
143 * 2 CTR-Y1-OUT1 PPI-Y-C0
144 * 3 CTR-Y2-OUT1 PPI-Y-C3
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v3.yaml14 Peripheral Interrupts (PPI), Shared Peripheral Interrupts (SPI),
43 If the system requires describing PPI affinity, then the value must
46 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
48 Extended PPI range. Other values are reserved for future use.
51 SPI interrupts are in the range [0-987]. PPI interrupts are in the
53 Extended PPI interrupts are in the range [0-127].
61 interrupt is affine to. The interrupt must be a PPI, and the node
62 pointed must be a subnode of the "ppi-partitions" subnode. For
63 interrupt types other than PPI or PPIs that are not partitioned,
64 this cell must be zero. See the "ppi-partitions" node description
[all …]
H A Darm,gic.yaml14 interrupts (PPI), shared processor interrupts (SPI) and software
74 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
78 SPI interrupts are in the range [0-987]. PPI interrupts are in the
87 bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of
89 the interrupt is wired to that CPU. Only valid for PPI interrupts.
90 Also note that the configurability of PPI interrupts is IMPLEMENTATION
/linux/drivers/char/tpm/
H A Dtpm_ppi.c12 * This file contains implementation of the sysfs interface for PPI.
28 #define PPI_TPM_REQ_MAX 101 /* PPI 1.3 for TPM 2 */
126 * is updated with function index from SUBREQ to SUBREQ2 since PPI in tpm_store_ppi_request()
134 * PPI spec defines params[3].type as ACPI_TYPE_PACKAGE. Some BIOS in tpm_store_ppi_request()
136 * string/package type. For PPI version 1.0 and 1.1, use buffer type in tpm_store_ppi_request()
198 * PPI spec defines params[3].type as empty package, but some platforms in tpm_show_ppi_transition_action()
199 * (e.g. Capella with PPI 1.0) need integer/string/buffer type, so for in tpm_show_ppi_transition_action()
200 * compatibility, define params[3].type as buffer, if PPI version < 1.2 in tpm_show_ppi_transition_action()
362 .name = "ppi",
377 /* Cache PPI version string. */ in tpm_add_ppi()
/linux/drivers/ata/
H A Dpata_cmd64x.c426 const struct ata_port_info *ppi[] = { in cmd64x_init_one() local
451 ppi[0] = &cmd_info[3]; in cmd64x_init_one()
452 ppi[1] = &cmd_info[3]; in cmd64x_init_one()
457 ppi[0] = &cmd_info[2]; in cmd64x_init_one()
458 ppi[1] = &cmd_info[2]; in cmd64x_init_one()
462 ppi[0] = &cmd_info[4]; in cmd64x_init_one()
463 ppi[1] = &cmd_info[4]; in cmd64x_init_one()
480 ppi[0] = &ata_dummy_port_info; in cmd64x_init_one()
485 ppi[1] = &ata_dummy_port_info; in cmd64x_init_one()
488 return ata_pci_bmdma_init_one(pdev, ppi, &cmd64x_sht, NULL, 0); in cmd64x_init_one()
H A Dpata_ali.c552 const struct ata_port_info *ppi[] = { NULL, NULL }; in ali_init_one() local
566 ppi[0] = &info_early; in ali_init_one()
568 ppi[0] = &info_20; in ali_init_one()
570 ppi[0] = &info_c2; in ali_init_one()
572 ppi[0] = &info_c3; in ali_init_one()
574 ppi[0] = &info_c4; in ali_init_one()
576 ppi[0] = &info_c5; in ali_init_one()
584 ppi[0] = &info_20_udma; in ali_init_one()
587 if (!ppi[0]->mwdma_mask && !ppi[0]->udma_mask) in ali_init_one()
588 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL, 0); in ali_init_one()
[all …]
H A Dpata_hpt37x.c800 const struct ata_port_info *ppi[] = { NULL, NULL }; in hpt37x_init_one() local
829 ppi[0] = &info_hpt370; in hpt37x_init_one()
834 ppi[0] = &info_hpt370a; in hpt37x_init_one()
839 ppi[0] = &info_hpt372; in hpt37x_init_one()
853 ppi[0] = &info_hpt372; in hpt37x_init_one()
860 ppi[0] = &info_hpt302; in hpt37x_init_one()
867 ppi[0] = &info_hpt302; in hpt37x_init_one()
880 *ppi = &info_hpt374_fn0; in hpt37x_init_one()
882 *ppi = &info_hpt374_fn1; in hpt37x_init_one()
951 dpll = (ppi[0]->udma_mask & 0xC0) ? 3 : 2; in hpt37x_init_one()
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H A Dsata_sis.c184 const struct ata_port_info *ppi[] = { &pi, &pi }; in sis_init_one() local
221 ppi[1] = &sis_info133_for_sata; in sis_init_one()
225 ppi[0] = &sis_info133_for_sata; in sis_init_one()
260 ppi[0] = &sis_info133_for_sata; in sis_init_one()
261 ppi[1] = &sis_info133_for_sata; in sis_init_one()
265 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host); in sis_init_one()
H A Dpata_cs5520.c119 const struct ata_port_info *ppi[2]; in cs5520_init_one() local
137 ppi[0] = ppi[1] = &ata_dummy_port_info; in cs5520_init_one()
139 ppi[0] = &pi; in cs5520_init_one()
141 ppi[1] = &pi; in cs5520_init_one()
150 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); in cs5520_init_one()
H A Dpata_cs5536.c255 const struct ata_port_info *ppi[2]; in cs5536_init_one() local
259 ppi[0] = &no_udma_info; in cs5536_init_one()
261 ppi[0] = &info; in cs5536_init_one()
263 ppi[1] = &ata_dummy_port_info; in cs5536_init_one()
275 return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0); in cs5536_init_one()
H A Dpata_artop.c392 const struct ata_port_info *ppi[] = { NULL, NULL }; in artop_init_one() local
403 ppi[0] = &info_6210; in artop_init_one()
406 ppi[0] = &info_626x; in artop_init_one()
410 ppi[0] = &info_628x_fast; in artop_init_one()
412 ppi[0] = &info_628x; in artop_init_one()
416 BUG_ON(ppi[0] == NULL); in artop_init_one()
420 return ata_pci_bmdma_init_one(pdev, ppi, &artop_sht, NULL, 0); in artop_init_one()
/linux/drivers/media/pci/intel/ipu6/
H A Dipu6-isys-mcd-phy.c42 * PHY configurations are PPI based instead of port.
46 * | PPI | PPI5 | PPI4 | PPI3 | PPI2 | PPI1 | PPI0 |
67 * | PPI | PPI6 | PPI7 | PPI8 | PPI9 | PPI10 | PPI11 |
85 * ppi mapping per phy :
88 * Left : port0 - PPI range {0, 1, 2, 3, 4}
89 * Right: port2 - PPI range {6, 7, 8, 9, 10}
92 * Left: port0 - PPI range {0, 1, 2, 3, 4}
93 * Right: port2 - PPI range {6, 7, 8}, port3 - PPI range {9, 10, 11}
96 * Left: port0 - PPI range {0, 1, 2}, port1 - PPI range {3, 4, 5}
97 * Right: port2 - PPI range {6, 7, 8, 9, 10}
[all …]
/linux/include/xen/interface/hvm/
H A Dparams.h42 * val[15:8] is interrupt flag of the PPI used by event-channel:
43 * bit 8: the PPI is edge(1) or level(0) triggered
44 * bit 9: the PPI is active low(1) or high(0)
45 * val[7:0] is a PPI number used by event-channel.
/linux/drivers/net/hyperv/
H A Drndis_filter.c387 struct rndis_per_packet_info *ppi; in rndis_get_ppi() local
401 if (rpkt->per_pkt_info_len < sizeof(*ppi) || in rndis_get_ppi()
408 ppi = (struct rndis_per_packet_info *)((ulong)rpkt + in rndis_get_ppi()
411 memcpy(ppi, data + RNDIS_HEADER_SIZE + rpkt->per_pkt_info_offset, rpkt->per_pkt_info_len); in rndis_get_ppi()
416 if (ppi->size > len) { in rndis_get_ppi()
417 netdev_err(ndev, "Invalid ppi size: %u\n", ppi->size); in rndis_get_ppi()
421 if (ppi->ppi_offset >= ppi->size) { in rndis_get_ppi()
422 netdev_err(ndev, "Invalid ppi_offset: %u\n", ppi->ppi_offset); in rndis_get_ppi()
426 if (ppi->type == type && ppi->internal == internal) { in rndis_get_ppi()
427 /* ppi->size should be big enough to hold the returned object. */ in rndis_get_ppi()
[all …]
/linux/Documentation/devicetree/bindings/arm/
H A Dpmu.yaml80 description: 1 per-cpu interrupt (PPI) or 1 interrupt per core.
91 When using a PPI, specifies a list of phandles to CPU
93 a PMU of this type signalling the PPI listed in the
95 by the PPI interrupt specifier itself (in which case
/linux/drivers/irqchip/
H A Dirq-gic-common.c78 * configuration for a PPI this is most likely because the GIC in gic_configure_irq()
110 * Deactivate and disable all SPIs. Leave the PPI and SGIs in gic_dist_config()
126 * Deal with the banked PPI and SGI interrupts - disable all in gic_cpu_config()
137 * Set priority on PPI and SGI interrupts in gic_cpu_config()
/linux/drivers/nfc/st21nfca/
H A Ddep.c68 u8 ppi; member
81 u8 ppi; member
167 atr_res->ppi = ST21NFCA_LR_BITS_PAYLOAD_SIZE_254B; in st21nfca_tm_send_atr_res()
172 atr_res->ppi |= ST21NFCA_GB_BIT; in st21nfca_tm_send_atr_res()
480 if (ST21NFCA_PP2LRI(atr_res->ppi) != info->dep_info.lri) in st21nfca_im_recv_atr_res_cb()
483 ST21NFCA_PP2LRI(atr_res->ppi)); in st21nfca_im_recv_atr_res_cb()
533 atr_req->ppi = ST21NFCA_LR_BITS_PAYLOAD_SIZE_254B; in st21nfca_im_send_atr_req()
535 atr_req->ppi |= ST21NFCA_GB_BIT; in st21nfca_im_send_atr_req()
547 info->dep_info.lri = ST21NFCA_PP2LRI(atr_req->ppi); in st21nfca_im_send_atr_req()
/linux/Documentation/devicetree/bindings/perf/
H A Dspe-pmu.yaml23 The PPI to signal SPE events. For heterogeneous systems where SPE is only
25 for details on describing a PPI partition.
/linux/arch/arm64/boot/dts/sprd/
H A Dums9620.dtsi141 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, /* Physical Secure PPI */
142 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, /* Physical Non-Secure PPI */
143 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, /* Virtual PPI */
144 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; /* Hipervisor PPI */

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