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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dsifive,fu540-c000-pdma.yaml4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
32 - microchip,mpfs-pdma
33 - sifive,fu540-c000-pdma
36 Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
38 "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
39 SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
68 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
H A Dmmp-dma.txt7 - compatible: Should be "marvell,pdma-1.0"
10 or one irq for pdma device
20 "marvell,pdma-1.0"
30 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
33 pdma: dma-controller@d4000000 {
34 compatible = "marvell,pdma-1.0";
46 pdma: dma-controller@d4000000 {
47 compatible = "marvell,pdma-1.0";
H A Dmarvell,mmp-dma.yaml18 - marvell,pdma-1.0
54 - marvell,pdma-1.0
67 compatible = "marvell,pdma-1.0";
H A Darm-pl330.txt26 pdma0: pdma@12680000 {
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Dx1830.dtsi256 dmas = <&pdma X1830_DMA_SSI0_RX 0xffffffff>,
257 <&pdma X1830_DMA_SSI0_TX 0xffffffff>;
275 dmas = <&pdma X1830_DMA_SSI1_RX 0xffffffff>,
276 <&pdma X1830_DMA_SSI1_TX 0xffffffff>;
333 pdma: dma-controller@13420000 { label
359 dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>,
360 <&pdma X1830_DMA_MSC0_TX 0xffffffff>;
380 dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>,
381 <&pdma X1830_DMA_MSC1_TX 0xffffffff>;
H A Dx1000.dtsi274 dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
275 <&pdma X1000_DMA_SSI0_TX 0xffffffff>;
323 pdma: dma-controller@13420000 { label
349 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
350 <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
370 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
371 <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
434 dmas = <&pdma X1000_DMA_I2S0_RX 0xffffffff>,
435 <&pdma X1000_DMA_I2S0_TX 0xffffffff>;
/freebsd/sys/contrib/device-tree/src/arm/intel/pxa/
H A Dpxa3xx.dtsi121 pdma: dma-controller@40000000 { label
122 compatible = "marvell,pdma-1.0";
150 dmas = <&pdma 97 3>;
188 dmas = <&pdma 21 3
189 &pdma 22 3>;
199 dmas = <&pdma 93 3
200 &pdma 94 3>;
210 dmas = <&pdma 46 3
211 &pdma 47 3>;
H A Dpxa27x.dtsi11 pdma: dma-controller@40000000 { label
12 compatible = "marvell,pdma-1.0";
107 dmas = <&pdma 68 0 /* Y channel */
108 &pdma 69 0 /* U channel */
109 &pdma 70 0>; /* V channel */
H A Dpxa300-raumfeld-common.dtsi53 dmas = <&pdma 13 3
54 &pdma 14 3>;
65 dmas = <&pdma 15 3
66 &pdma 16 3>;
H A Dpxa25x.dtsi37 pdma: dma-controller@40000000 { label
38 compatible = "marvell,pdma-1.0";
H A Dpxa2xx.dtsi142 dmas = <&pdma 21 3
143 &pdma 22 3>;
/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dartpec6-crypto.txt1 Axis crypto engine with PDMA interface.
7 - reg: Base address and size for the PDMA register area.
8 - interrupts: Interrupt handle for the PDMA interrupt line.
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3128.dtsi432 dmas = <&pdma 14>, <&pdma 15>;
444 dmas = <&pdma 13>;
468 dmas = <&pdma 10>;
484 dmas = <&pdma 11>;
500 dmas = <&pdma 12>;
515 dmas = <&pdma 0>, <&pdma 1>;
767 dmas = <&pdma 2>, <&pdma 3>;
783 dmas = <&pdma 4>, <&pdma 5>;
799 dmas = <&pdma 6>, <&pdma 7>;
839 dmas = <&pdma 8>, <&pdma 9>;
[all …]
H A Drv1108.dtsi105 dmas = <&pdma 6>, <&pdma 7>;
120 dmas = <&pdma 4>, <&pdma 5>;
135 dmas = <&pdma 2>, <&pdma 3>;
189 dmas = <&pdma 8>, <&pdma 9>;
240 pdma: dma-controller@102a0000 {
244 pdma: dma-controller@102a0000 { global() label
H A Drk3036.dtsi289 dmas = <&pdma 12>;
307 dmas = <&pdma 0>, <&pdma 1>;
561 dmas = <&pdma 8>, <&pdma 9>;
570 pdma: dma-controller@20078000 { label
H A Drk322x.dtsi145 dmas = <&pdma 14>, <&pdma 15>;
158 dmas = <&pdma 11>, <&pdma 12>;
169 dmas = <&pdma 10>;
182 dmas = <&pdma 0>, <&pdma 1>;
510 pdma: dma-controller@110f0000 { label
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dairoha,en7581-eth.yaml44 - description: PDMA irq
52 - const: pdma
120 reset-names = "fe", "pdma", "qdma", "xsi-mac",
/freebsd/sys/dts/arm/
H A Dsocfpga_arria10_socdk_sdmmc.dts89 dmas = <&pdma 24>, <&pdma 25>;
/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/
H A Ddma.c114 dev_err(mdev->dev, "PDMA engine busy\n"); in mt7615_wait_pdma_busy()
123 dev_err(mdev->dev, "PDMA engine tx busy\n"); in mt7615_wait_pdma_busy()
135 dev_err(mdev->dev, "PDMA engine busy\n"); in mt7615_wait_pdma_busy()
H A Dpci.c110 dev_err(mdev->dev, "PDMA sleep protection failed\n"); in mt7615_pci_suspend()
164 dev_err(mdev->dev, "PDMA engine must be reinitialized\n"); in mt7615_pci_resume()
/freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/
H A Dsocfpga.dtsi71 pdma: pdma@ffe01000 { label
915 dmas = <&pdma 28>,
916 <&pdma 29>;
928 dmas = <&pdma 30>,
929 <&pdma 31>;
H A Dsocfpga_arria10.dtsi63 pdma: pdma@ffda1000 { label
634 tx-dma-channel = <&pdma 16>;
635 rx-dma-channel = <&pdma 17>;
752 altr,ecc-parent = <&pdma>;
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dusb_mcu.c114 /* FCE pdma enable */ in mt76x2u_mcu_load_rom_patch()
192 /* FCE pdma enable */ in mt76x2u_mcu_load_firmware()
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Drockchip,pdm.txt32 dmas = <&pdma 16>;
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsynopsys-dw-mshc.yaml88 dmas = <&pdma 12>;

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