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/linux/arch/parisc/kernel/
H A Dprocessor.c28 #include <asm/pdc.h>
57 ** The code path not shared is how PDC hands control of the CPU to the OS.
104 txn_addr = dev->hpa.start; /* for legacy PDC */ in processor_probe()
143 * We'll care when we need to query PAT PDC about a CPU *after* in processor_probe()
242 #define p ((unsigned long *)&boot_cpu_data.pdc.model) in collect_boot_cpu_data()
243 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) { in collect_boot_cpu_data()
248 add_device_randomness(&boot_cpu_data.pdc.model, in collect_boot_cpu_data()
249 sizeof(boot_cpu_data.pdc.model)); in collect_boot_cpu_data()
253 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) { in collect_boot_cpu_data()
255 boot_cpu_data.pdc.versions); in collect_boot_cpu_data()
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H A Dpacache.S10 * NOTE: fdc,fic, and pdc instructions that use base register modification
806 1: pdc,m r31(%r28)
807 pdc,m r31(%r28)
808 pdc,m r31(%r28)
809 pdc,m r31(%r28)
810 pdc,m r31(%r28)
811 pdc,m r31(%r28)
812 pdc,m r31(%r28)
813 pdc,m r31(%r28)
814 pdc,m r31(%r28)
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H A Dfirmware.c3 * arch/parisc/kernel/firmware.c - safe PDC access routines
5 * PDC == Processor Dependent Code
7 * See PDC documentation at
20 * guidelines when writing PDC wrappers:
22 * - the name of the pdc wrapper should match one of the macros
25 * - use the static PDC result buffers and "copyout" to structs
27 * - hold pdc_lock while in PDC or using static result buffers
30 * - the name of the struct used for pdc return values should equal
32 * corresponding PDC call
64 #include <asm/pdc.h>
[all …]
H A Dinventory.c26 #include <asm/pdc.h>
35 ** DEBUG_PAT Dump details which PDC PAT provides about ranges/devices.
58 /* Determine the pdc "type" used on this machine */ in setup_pdc()
60 printk(KERN_INFO "Determining PDC firmware type: "); in setup_pdc()
71 * is a pdc pat box, or it is an older box. All 64 bit capable in setup_pdc()
72 * machines are either pdc pat boxes or they support PDC_SYSTEM_MAP. in setup_pdc()
127 #define PDC_PAGE_ADJ_SHIFT (PAGE_SHIFT - 12) /* pdc pages are always 4k */
137 * pdc info is bad in this case). in set_pmem_entry()
174 /* All of the PDC PAT specific code is 64-bit only */
193 long status; /* PDC return value status */ in pat_query_module()
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H A Dpdc_chassis.c3 * interfaces to Chassis Codes via PDC (firmware)
32 #include <asm/pdc.h>
87 * As soon as a panic occurs, we should inform the PDC.
110 * As soon as a reboot occurs, we should inform the PDC.
159 * Only machines with 64 bits PDC PAT and those reported in
162 * returns 0 if no error, -1 if no supported PDC is present or invalid message,
163 * else returns the appropriate PDC error code.
281 printk(KERN_INFO "Enabling PDC chassis warnings support v%s\n", in pdc_chassis_create_procfs()
H A Dpdc_cons.c3 * PDC early console support - use PDC firmware to dump text via boot console
13 #include <asm/pdc.h> /* for iodc_call() proto and friends */
65 EARLYCON_DECLARE(pdc, pdc_earlycon_setup);
H A Dprocess.c47 #include <asm/pdc.h>
59 ** the system. An HVERSION dependent PDC call was developed
65 ** issued. Obviously, if the PDC does implement PDC_BROADCAST_RESET
66 ** the PDC call will not return (the system will be reset).
151 * Detect when running on QEMU with SeaBIOS PDC Firmware and let
175 /* Let PDC firmware put CPU into firmware idle loop. */ in arch_cpu_idle_dead()
178 pr_warn("PDC does not provide rendezvous function.\n"); in arch_cpu_idle_dead()
/linux/sound/soc/atmel/
H A Datmel-pcm.h32 unsigned int xpr; /* PDC recv/trans pointer */
33 unsigned int xcr; /* PDC recv/trans counter */
34 unsigned int xnpr; /* PDC next recv/trans pointer */
35 unsigned int xncr; /* PDC next recv/trans counter */
36 unsigned int ptcr; /* PDC transfer control */
45 u32 pdc_enable; /* PDC recv/trans enable */
46 u32 pdc_disable; /* PDC recv/trans disable */
52 * PDC DMA operation. All fields except dma_intr_handler() are initialized
59 int pdc_xfer_size; /* PDC counter increment in bytes */
61 struct atmel_pdc_regs *pdc; /* PDC receive or transmit registers */ member
[all …]
H A Datmel-pcm-pdc.c103 /* re-start the PDC */ in atmel_pcm_dma_irq()
110 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_dma_irq()
112 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_dma_irq()
119 /* Load the PDC next pointer and counter registers */ in atmel_pcm_dma_irq()
124 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_dma_irq()
126 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_dma_irq()
208 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_trigger()
210 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_trigger()
214 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_trigger()
216 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_trigger()
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H A DMakefile3 snd-soc-atmel-pcm-pdc-y := atmel-pcm-pdc.o
12 # pdc and dma need to both be built-in if any user of
15 obj-$(CONFIG_SND_ATMEL_SOC_SSC) += snd-soc-atmel-pcm-pdc.o
/linux/drivers/mailbox/
H A Dbcm-pdc-mailbox.c7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
20 * The PDC driver allows multiple messages to be pending in the descriptor
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/linux/Documentation/devicetree/bindings/reset/
H A Dqcom,pdc-global.yaml4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
21 - const: qcom,sc7180-pdc-global
22 - const: qcom,sdm845-pdc-global
26 - const: qcom,sc7280-pdc-global
30 - const: qcom,sdm845-pdc-global
48 compatible = "qcom,sdm845-pdc-global";
/linux/drivers/irqchip/
H A Dqcom-pdc.c38 /* Notable PDC versions */
147 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
169 * qcom_pdc_gic_set_type: Configure PDC for the interrupt
174 * If @type is edge triggered, forward that as Rising edge as PDC
176 * If @type is level, then forward that as level high as PDC
218 * When we change types the PDC can give a phantom interrupt. in qcom_pdc_gic_set_type()
233 .name = "PDC",
316 n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32)); in pdc_setup_pin_mapping()
328 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
333 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
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H A Dirq-imgpdc.c3 * IMG PowerDown Controller (PDC)
7 * Exposes the syswake and PDC peripheral wake interrupts to the system.
20 /* PDC interrupt register numbers */
31 /* PDC interrupt register field masks */
56 /* PDC interrupt constants */
66 * struct pdc_intc_priv - private pdc interrupt data.
70 * @syswake_irq: Shared PDC syswake IRQ number.
71 * @domain: IRQ domain for PDC peripheral and syswake IRQs.
72 * @pdc_base: Base of PDC registers.
74 * @lock: Lock to protect the PDC syswake registers and the cached
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/linux/include/linux/
H A Datmel-ssc.h276 /* SSC PDC Receive Pointer Register */
279 /* SSC PDC Receive Counter Register */
282 /* SSC PDC Transmit Pointer Register */
285 /* SSC PDC Receive Next Pointer Register */
288 /* SSC PDC Receive Next Counter Register */
291 /* SSC PDC Transmit Counter Register */
294 /* SSC PDC Transmit Next Pointer Register */
297 /* SSC PDC Transmit Next Counter Register */
300 /* SSC PDC Transfer Control Register */
311 /* SSC PDC Transfer Status Register */
/linux/drivers/tty/serial/
H A Datmel_serial.c121 bool use_pdc_rx; /* enable PDC receiver */
122 short pdc_rx_idx; /* current PDC RX buffer */
123 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
126 bool use_pdc_tx; /* enable PDC transmitter */
127 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
560 /* disable PDC transmit */ in atmel_stop_tx()
601 /* re-enable PDC transmit */ in atmel_start_tx()
626 /* enable PDC controller */ in atmel_start_rx()
644 /* disable PDC receive */ in atmel_stop_rx()
1290 * PDC receive. Just schedule the tasklet and let it in atmel_handle_receive()
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dimg,pdc-intc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/img,pdc-intc.yaml#
7 title: ImgTec Powerdown Controller (PDC) Interrupt Controller
13 ImgTec Powerdown Controller (PDC) Interrupt Controller has a number of input
19 const: img,pdc-intc
72 compatible = "img,pdc-intc";
/linux/arch/parisc/include/asm/
H A Dpdcpat.h63 /* PDC PAT CHASSIS LOG -- Platform logging & forward progress functions */
70 /* PDC PAT COMPLEX */
74 /* PDC PAT CPU -- CPU configuration within the protection domain */
86 #define PDC_PAT_CPU_GET_PDC_ENTRYPOINT 11L /* Return PDC Entry point */
90 /* PDC PAT EVENT -- Platform Events */
99 /* PDC PAT HPMC -- Cause processor to go into spin loop, and wait
105 #define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
114 /* PDC PAT IO -- On-line services for I/O modules */
144 /* PDC PAT MEM -- Manage memory page deallocation */
169 /* PDC PAT NVOLATILE -- Access Non-Volatile Memory */
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H A Dpdc.h5 #include <uapi/asm/pdc.h>
14 extern unsigned long parisc_pat_pdc_cap; /* PDC capabilities (PAT) */
18 #define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
24 /* wrapper-functions from pdc.c */
H A Dpdc_chassis.h51 /* Old PDC LED control */
55 * Available PDC PAT LED states
72 * Valid PDC PAT LED states combinations
125 /* Cannot execute PDC */
130 /* Boot failed - OS not up - PDC has detected a failure that prevents boot */
150 * PDC Log events
/linux/Documentation/devicetree/bindings/watchdog/
H A Dimg,pdc-wdt.yaml4 $id: http://devicetree.org/schemas/watchdog/img,pdc-wdt.yaml#
7 title: ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
18 - img,pdc-wdt
50 compatible = "img,pdc-wdt";
/linux/drivers/parisc/
H A DKconfig116 bool "PDC chassis state codes support"
134 bool "PDC chassis warnings support"
148 tristate "PDC Stable Storage support"
153 variables (PDC non volatile variables such as Primary Boot Path,
H A Diosapic.c51 ** For PCI devices, "Legacy" PDC initializes the "INTERRUPT_LINE" register
53 ** The newer "PAT" firmware supports PDC calls which return tables.
57 ** One such PAT PDC call returns the "Interrupt Routing Table" (IRT).
128 #include <asm/pdc.h>
257 long status; /* PDC return value status */ in iosapic_load_irt()
264 /* Use pat pdc routine to get interrupt routing table size */ in iosapic_load_irt()
291 ** C3000/J5000 (and similar) platforms with Sprockets PDC in iosapic_load_irt()
370 irt_cell = NULL; /* old PDC w/o iosapic */ in iosapic_init()
438 ** Legacy PDC already does this translation for us and stores it in INTR_LINE.
440 ** PAT PDC needs to basically do what legacy PDC does:
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/linux/arch/parisc/include/uapi/asm/
H A Dpdc.h6 * PDC return values ...
7 * All PDC calls return a subset of these errors.
25 * PDC entry points...
31 #define PDC_CHASSIS 2 /* PDC-chassis functions */
44 #define PDC_MODEL 4 /* PDC model information call */
120 #define PDC_ADD_VALID 12 /* Memory validation PDC call */
179 #define PDC_ALLOC 24 /* allocate static storage for PDC & IODC */
259 /* Legacy PDC definitions for same stuff */
419 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
429 unsigned int mem_pdc; /* PDC entry point */
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7280-adsp-pil.yaml64 - description: PDC AUDIO SYNC RESET
147 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
156 interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>,

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