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/linux/Documentation/devicetree/bindings/reset/
H A Dqcom,pdc-global.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PDC Global
10 - Sibi Sankar <quic_sibis@quicinc.com>
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
19 - description: on SC7180 SoCs the following compatibles must be specified
21 - const: qcom,sc7180-pdc-global
22 - const: qcom,sdm845-pdc-global
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/linux/arch/parisc/kernel/
H A Dinventory.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2001 Matthew Wilcox for Hewlett-Packard
13 * Map before checking for a Snake -- this probably doesn't cause any
26 #include <asm/pdc.h>
30 #include <asm/parisc-device.h>
35 ** DEBUG_PAT Dump details which PDC PAT provides about ranges/devices.
58 /* Determine the pdc "type" used on this machine */ in setup_pdc()
60 printk(KERN_INFO "Determining PDC firmware type: "); in setup_pdc()
71 * is a pdc pat box, or it is an older box. All 64 bit capable in setup_pdc()
72 * machines are either pdc pat boxes or they support PDC_SYSTEM_MAP. in setup_pdc()
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H A Dprocessor.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Initial setup-routines for HP 9000 based hardware.
6 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
28 #include <asm/pdc.h>
32 #include <asm/parisc-device.h>
44 ** PARISC CPU driver - claim "device" and initialize CPU data structures.
50 ** The callback *should* do per-instance initialization of
57 ** The code path not shared is how PDC hands control of the CPU to the OS.
62 * init_percpu_prof - enable/setup per cpu profiling hooks.
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H A Dhead.S5 * Copyright (C) 1999-2007 by Helge Deller <deller@gmx.de>
12 * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
15 #include <asm/asm-offsets.h>
17 #include <asm/pdc.h>
43 .import $global$ /* forward declaration */
49 /* Make sure sr4-sr7 are set to zero for the kernel address space */
74 /* check for 64-bit capable CPU as required by current kernel */
83 ldi msg1_end-msg1,%arg1
94 stw %r1,-52(%sp) // arg4
95 stw %r0,-56(%sp) // arg5
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H A Dsetup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Initial setup-routines for HP 9000 based hardware.
6 * Modifications for PA-RISC (C) 1999 Helge Deller <deller@gmx.de>
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
32 #include <asm/pdc.h>
49 /* boot_args[0] is free-mem start, boot_args[1] is ptr to command line */ in setup_cmdline()
61 if (PAGE0->mem_cons.cl_class == CL_DUPLEX) in setup_cmdline()
69 strlcat(p, " earlycon=pdc", COMMAND_LINE_SIZE); in setup_cmdline()
91 panic( "PA-RISC Linux currently only supports machines that conform to\n" in dma_ops_init()
92 "the PA-RISC 1.1 or 2.0 architecture specification.\n"); in dma_ops_init()
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H A Dentry.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
8 * Copyright (C) 2000 Hewlett-Packard (John Marvin)
9 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
12 #include <asm/asm-offsets.h>
15 * - handle in assembly and use shadowed registers only
16 * - save registers to kernel stack and handle in assembly or C */
70 extrd,u \spc,(64 - (SPACEID_SHIFT)),32,\prot
92 * to use a non-shadowed register to carry the value over
97 * be a non-shadowed register so that it survives the rfir.
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 #include <dt-bindings/interconnect/qcom,sdx65.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
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/linux/arch/parisc/boot/compressed/
H A Dhead.S9 #include <asm/asm-offsets.h>
12 #include <asm/pdc.h>
19 .import $global$ /* forward declaration */
35 extrw,u %r1, PSW_W_BIT-32, 1, %r1
38 /* Make sure sr4-sr7 are set to zero for the kernel address space */
56 /* Initialize the global data pointer */
61 copy %arg2, %r7 /* rd-start */
62 copy %arg3, %r8 /* rd-end */
67 ssm PSW_W_SM, %r0 /* set W-bit */
76 rsm PSW_W_SM, %r0 /* clear W-bit */
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/linux/drivers/mailbox/
H A Dbcm-pdc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
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/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/linux/arch/parisc/include/asm/
H A Dropes.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/parisc-device.h>
8 /* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
33 unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
34 unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
38 unsigned long *res_hint; /* next avail IOVP - circular search */
85 unsigned int num_ioc; /* number of on-board IOC's */
99 return d->id.hversion == ASTRO_RUNWAY_PORT; in IS_ASTRO()
103 return d->id.hversion == IKE_MERCED_PORT; in IS_IKE()
107 return d->id.hversion == PLUTO_MCKINLEY_PORT; in IS_PLUTO()
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/linux/arch/arm64/boot/dts/qcom/
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
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H A Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interconnect/qcom,icc.h>
11 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
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H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
12 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
13 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
14 #include <dt-bindings/clock/qcom,rpmh.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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/linux/drivers/parisc/
H A Ddino.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 ** (c) Copyright 1999,2000 Hewlett-Packard Company
9 ** (c) Copyright 2006-2019 Helge Deller
21 ** The different between Built-in Dino and Card-Mode
24 ** Linux drivers can only use Card-Mode Dino if pci devices I/O port
32 ** 2001-06-14 : Clement Moyroud (moyroudc@esiee.fr)
33 ** - added support for the integrated RS232.
53 #include <asm/pdc.h>
70 ** Config accessor functions only pass in the 8-bit bus number
71 ** and not the 8-bit "PCI Segment" number. Each Dino will be
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/linux/drivers/ata/
H A Dsata_qstor.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_qstor.c - Pacific Digital Corporation QStor SATA
11 * as Documentation/driver-api/libata.rst
38 /* global register offsets */
41 QS_HCT_CTRL = 0x00e4, /* global interrupt mask offset */
45 /* global control bits */
46 QS_HPHY_64BIT = (1 << 1), /* 64-bit bus detected */
47 QS_CNFG3_GSRST = 0x01, /* global chip reset */
50 /* per-channel register offsets */
57 QS_CCT_CTR0 = 0x0900, /* chan control-0 offset */
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H A Dpdc_adma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pdc_adma.c - Pacific Digital Corporation ADMA
10 * as Documentation/driver-api/libata.rst
12 * Supports ATA disks in single-packet ADMA mode.
41 ADMA_REGS((ap)->host->iomap[ADMA_MMIO_BAR], ap->port_no)
53 /* global register offsets */
56 /* per-channel register offsets */
104 board_1841_idx = 0, /* ADMA 2-port controller */
160 { PCI_VDEVICE(PDC, 0x1841), board_1841_idx },
190 struct adma_port_priv *pp = ap->private_data; in adma_reinit_engine()
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/linux/include/xen/interface/
H A Dplatform.h1 /* SPDX-License-Identifier: MIT */
5 * Hardware platform operations. Intended for use by domain-0 kernel.
7 * Copyright (c) 2002-2006, K Fraser
40 * Request memory range (@mfn, @mfn+@nr_mfns-1) to have type @type.
41 * On x86, @type is an architecture-defined MTRR memory type.
44 * (x86-specific).
59 * Tear down an existing memory-range type. If @handle is remembered then it
63 * (x86-specific).
73 /* Read current type of an MTRR (x86-specific). */
94 #define QUIRK_NOIRQBALANCING 1 /* Do not restrict IO-APIC RTE targets */
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/linux/drivers/pci/hotplug/
H A Dpnv_php.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <asm/pnv-pci.h>
20 #include <asm/ppc-pci.h>
27 ((sl)->pdev ? pci_warn((sl)->pdev, x) : dev_warn(&(sl)->bus->dev, x))
47 struct pci_dev *pdev = php_slot->pdev; in pnv_php_disable_irq()
50 if (php_slot->irq > 0) { in pnv_php_disable_irq()
57 free_irq(php_slot->irq, php_slot); in pnv_php_disable_irq()
58 php_slot->irq = 0; in pnv_php_disable_irq()
62 if (pdev->msix_enabled) in pnv_php_disable_irq()
64 else if (pdev->msi_enabled) in pnv_php_disable_irq()
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/linux/drivers/usb/host/
H A Dpci-quirks.c1 // SPDX-License-Identifier: GPL-2.0
4 * Some of it includes work-arounds for PCI hardware and BIOS quirks.
5 * It may need to run early during booting -- before USB would normally
6 * initialize -- to ensure that Linux doesn't use any legacy modes.
22 #include "pci-quirks.h"
23 #include "xhci-ext-caps.h"
33 #define UHCI_USBCMD_EGSM 0x0008 /* Global Suspend Mode */
146 * amd_chipset_sb_type_init - initialize amd chipset southbridge type
156 pinfo->sb_type.gen = AMD_CHIPSET_UNKNOWN; in amd_chipset_sb_type_init()
158 pinfo->smbus_dev = pci_get_device(PCI_VENDOR_ID_ATI, in amd_chipset_sb_type_init()
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/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nocmcff -- Disable firmware first mode for corrected
28 nospcr -- disable console in ACPI SPCR table as
45 If set to vendor, prefer vendor-specific driver
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