Lines Matching +full:pdc +full:- +full:global
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
8 * Copyright (C) 2000 Hewlett-Packard (John Marvin)
9 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
12 #include <asm/asm-offsets.h>
15 * - handle in assembly and use shadowed registers only
16 * - save registers to kernel stack and handle in assembly or C */
70 extrd,u \spc,(64 - (SPACEID_SHIFT)),32,\prot
92 * to use a non-shadowed register to carry the value over
97 * be a non-shadowed register so that it survives the rfir.
182 * itlb miss interruption handler (parisc 1.1 - 32 bit)
213 * naitlb miss interruption handler (parisc 1.1 - 32 bit)
245 * dtlb miss interruption handler (parisc 1.1 - 32 bit)
276 /* nadtlb miss interruption handler (parisc 1.1 - 32 bit) */
305 * dirty bit trap interruption handler (parisc 1.1 - 32 bit)
361 spc - The space we saw the fault with.
362 tmp - The place to store the current space.
363 fault - Function to call on failure.
380 /* Look up a PTE in a 2-Level scheme (faulting at each
388 extru_safe \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
390 extru_safe \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
400 extru_safe \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index
405 /* Look up PTE in a 3-Level scheme. */
409 extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
447 insert_nops NUM_PIPELINE_INSNS - 4
449 insert_nops NUM_PIPELINE_INSNS - 1
471 * - 38 to 52-bit Physical Page Number
472 * - 12 to 26-bit page offset
476 #define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
477 #define PAGE_ADD_HUGE_SHIFT (REAL_HPAGE_SHIFT-12)
478 #define PFN_START_BIT (63-ASM_PFN_PTE_SHIFT+(63-58)-PAGE_ADD_SHIFT)
487 (63-58)+PAGE_ADD_SHIFT,\pte
490 (63-58)+PAGE_ADD_HUGE_SHIFT,\pte
494 (63-58)+PAGE_ADD_SHIFT,\pte
509 * T <-> _PAGE_REFTRAP
510 * D <-> _PAGE_DIRTY
511 * B <-> _PAGE_DMB (memory break)
515 * See 3-14 of the parisc 2.0 manual
541 * (that means T-class is NOT supported) and the memory controllers
571 SHRREG \pte,(ASM_PFN_PTE_SHIFT-(31-26)),\pte
591 * the from tlb entry (or nothing if only a to entry---for
630 extrw,u,= \va,31-TMPALIAS_SIZE_BITS,1,%r0
635 SHRREG \pte,PAGE_SHIFT+PAGE_ADD_SHIFT-5, \pte
767 STREG %r2, -RP_OFFSET(%r30)
787 LDREG -RP_OFFSET(%r30), %r2
855 bb,<,n %r19,31-TIF_NEED_RESCHED,intr_do_resched /* forward */
880 ldo -16(%r30),%r29 /* Reference param save area */
939 ldo -16(%r30),%r29 /* Reference param save area */
961 /* current_thread_info()->preempt_count */
969 bb,<,n %r20, 31 - PSW_SM_I, intr_restore
1013 ldo -16(%r30),%r29 /* Reference param save area */
1091 ldo -16(%r30),%r29 /* Reference param save area */
1154 insert_nops NUM_PIPELINE_INSNS - 1
1181 insert_nops NUM_PIPELINE_INSNS - 1
1217 insert_nops NUM_PIPELINE_INSNS - 1
1251 insert_nops NUM_PIPELINE_INSNS - 1
1280 insert_nops NUM_PIPELINE_INSNS - 1
1309 insert_nops NUM_PIPELINE_INSNS - 1
1318 * Non-access misses can be caused by fdc,fic,pdc,lpa,probe and
1379 insert_nops NUM_PIPELINE_INSNS - 1
1439 insert_nops NUM_PIPELINE_INSNS - 1
1489 insert_nops NUM_PIPELINE_INSNS - 1
1592 %r3 - %r18 preserved by C code (saved by signal code)
1593 %r19 - %r20 saved in PT_REGS by gateway page
1594 %r21 - %r22 non-standard syscall args
1596 %r23 - %r26 arg3-arg0, saved in PT_REGS by gateway page
1597 %r27 - %r30 saved in PT_REGS by gateway page
1603 %fr0 - %fr3 status/exception, not preserved
1604 %fr4 - %fr7 arguments
1605 %fr8 - %fr11 not preserved by C code
1606 %fr12 - %fr21 preserved by C code
1607 %fr22 - %fr31 not preserved by C code
1684 STREG %r2, -RP_OFFSET(%r30)
1688 ldo -16(%r30),%r29 /* Reference param save area */
1694 ldo -FRAME_SIZE(%r30), %r30
1695 LDREG -RP_OFFSET(%r30), %r2
1730 bb,<,n %r19, 31-TIF_NEED_RESCHED, syscall_do_resched /* forward */
1741 /* Save callee-save registers (for sigcontext).
1751 ldo -16(%r30),%r29 /* Reference param save area */
1826 ldo -1(%r0),%r2 /* Set recovery cntr to -1 */
1830 depi -1,13,1,%r20 /* C, Q, D, and I bits */
1834 * numbers in asm-offsets.c */
1838 depi -1,27,1,%r20 /* R bit */
1842 depi -1,7,1,%r20 /* T bit */
1861 * We could make this more efficient by not saving r3-r18, but
1904 ldo -16(%r30),%r29 /* Reference param save area */
1938 .dword 0 /* code in head.S puts value of global gp here */
1951 .global ftrace_caller
1953 STREG %r3, -FTRACE_FRAME_SIZE+1*REG_SZ(%sp)
1954 ldo -FTRACE_FRAME_SIZE(%sp), %r3
1955 STREG %rp, -RP_OFFSET(%r3)
1972 ldo -16(%sp),%r29
1976 ldo -8(%r25), %r25
1981 LDREG -RP_OFFSET(%r3), %rp
1998 LDREGM -FTRACE_FRAME_SIZE(%sp), %r1
2000 ldo -4(%r1), %r1
2009 .global ftrace_regs_caller
2011 ldo -FTRACE_FRAME_SIZE(%sp), %r1
2012 STREG %rp, -RP_OFFSET(%r1)
2051 LDREG -FTRACE_FRAME_SIZE-PT_SZ_ALGN(%sp), %r25
2052 ldo -8(%r25), %r25
2053 ldo -FTRACE_FRAME_SIZE(%r1), %arg2
2057 ldo -PT_SZ_ALGN(%sp), %r1
2093 ldo -PT_SZ_ALGN(%sp), %sp
2094 LDREGM -FTRACE_FRAME_SIZE(%sp), %r1
2096 ldo -4(%r1), %r1
2110 STREG %r0,-RP_OFFSET(%sp) /* store 0 as %rp */
2125 ldo -16(%sp),%ret1 /* Reference param save area */
2144 LDREGM -FRAME_SIZE(%sp),%r3
2167 STREG %rp, -FRAME_SIZE-RP_OFFSET(%sp)
2171 STREG %r1, -FRAME_SIZE-REG_SZ(%sp)
2172 LDREG -FRAME_SIZE-RP_OFFSET(%sp), %rp
2174 LDREG -FRAME_SIZE-REG_SZ(%sp), %sp
2177 STREG %r1, -FRAME_SIZE-REG_SZ(%sp)
2178 STREG %rp, -FRAME_SIZE-RP_OFFSET(%sp)
2186 LDREG -FRAME_SIZE-RP_OFFSET(%sp), %rp
2188 LDREG -FRAME_SIZE-REG_SZ(%sp), %sp
2199 * registers we put a -1 into r1 to indicate that the register
2201 * a -1 in it, but that is OK, it just means that we will have
2208 bv %r0(%r25) /* r1 - shadowed */
2209 ldi -1,%r1
2222 bv %r0(%r25) /* r8 - shadowed */
2223 ldi -1,%r1
2224 bv %r0(%r25) /* r9 - shadowed */
2225 ldi -1,%r1
2238 bv %r0(%r25) /* r16 - shadowed */
2239 ldi -1,%r1
2240 bv %r0(%r25) /* r17 - shadowed */
2241 ldi -1,%r1
2254 bv %r0(%r25) /* r24 - shadowed */
2255 ldi -1,%r1
2256 bv %r0(%r25) /* r25 - shadowed */
2257 ldi -1,%r1