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/linux/Documentation/devicetree/bindings/thermal/
H A Drockchip-thermal.yaml93 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
/linux/drivers/clk/samsung/
H A Dclk-s3c64xx.c233 GATE_BUS(PCLK_TSADC, "pclk_tsadc", "pclk", PCLK_GATE, 12),
339 ALIAS(PCLK_TSADC, "s3c64xx-adc", "adc"),
/linux/include/dt-bindings/clock/
H A Dsamsung,s3c64xx-clock.h77 #define PCLK_TSADC 62 macro
H A Drk3188-cru-common.h101 #define PCLK_TSADC 349 macro
H A Drk3128-cru.h111 #define PCLK_TSADC 344 macro
H A Drk3228-cru.h110 #define PCLK_TSADC 344 macro
H A Drv1108-cru.h119 #define PCLK_TSADC 268 macro
H A Drk3368-cru.h130 #define PCLK_TSADC 346 macro
H A Drk3308-cru.h190 #define PCLK_TSADC 211 macro
H A Drk3328-cru.h144 #define PCLK_TSADC 213 macro
H A Dpx30-cru.h167 #define PCLK_TSADC 344 macro
H A Drk3288-cru.h138 #define PCLK_TSADC 346 macro
H A Drockchip,rk3576-cru.h145 #define PCLK_TSADC 127 macro
H A Drockchip,rk3588-cru.h172 #define PCLK_TSADC 157 macro
H A Drk3399-cru.h251 #define PCLK_TSADC 356 macro
H A Drk3568-cru.h335 #define PCLK_TSADC 271 macro
/linux/drivers/clk/rockchip/
H A Dclk-rk3228.c616 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 15, GFLAGS),
H A Dclk-rv1108.c647 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus_pre", 0,
H A Dclk-rk3188.c656 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_peri", 0, RK2928_CLKGATE_CON(4), 13, GFLAGS),
H A Dclk-rk3368.c805 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_peri", 0, RK3368_CLKGATE_CON(20), 0, GFLAGS),
H A Dclk-rk3328.c786 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 14, GFLAGS),
H A Dclk-rk3308.c879 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 8, GFLAGS),
H A Dclk-px30.c861 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus_pre", 0, PX30_CLKGATE_CON(15), 4, GFLAGS),
H A Dclk-rk3288.c747 GATE(PCLK_TSADC, "pclk_tsadc", "pclk_peri", 0, RK3288_CLKGATE_CON(7), 2, GFLAGS),
/linux/arch/arm/boot/dts/rockchip/
H A Drk3066a.dtsi282 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;

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