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/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/
H A Dmediatek,pciesys.txt1 MediaTek PCIESYS controller
4 The MediaTek PCIESYS controller provides various clocks to the system.
9 - "mediatek,mt7622-pciesys", "syscon"
10 - "mediatek,mt7629-pciesys", "syscon"
14 The PCIESYS controller uses the common clk binding from
20 pciesys: pciesys@1a100800 {
21 compatible = "mediatek,mt7622-pciesys", "syscon";
/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dahci-mtk.txt36 clocks = <&pciesys CLK_SATA_AHB_EN>,
37 <&pciesys CLK_SATA_AXI_EN>,
38 <&pciesys CLK_SATA_ASIC_EN>,
39 <&pciesys CLK_SATA_RBC_EN>,
40 <&pciesys CLK_SATA_PM_EN>;
46 resets = <&pciesys MT7622_SATA_AXI_BUS_RST>,
47 <&pciesys MT7622_SATA_PHY_SW_RST>,
48 <&pciesys MT7622_SATA_PHY_REG_RST>;
50 mediatek,phy-mode = <&pciesys>;
H A Dmediatek,mtk-ahci.yaml83 clocks = <&pciesys CLK_SATA_AHB_EN>,
84 <&pciesys CLK_SATA_AXI_EN>,
85 <&pciesys CLK_SATA_ASIC_EN>,
86 <&pciesys CLK_SATA_RBC_EN>,
87 <&pciesys CLK_SATA_PM_EN>;
93 resets = <&pciesys MT7622_SATA_AXI_BUS_RST>,
94 <&pciesys MT7622_SATA_PHY_SW_RST>,
95 <&pciesys MT7622_SATA_PHY_REG_RST>;
97 mediatek,phy-mode = <&pciesys>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmediatek,mt7622-pciesys.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt7622-pciesys.yaml#
7 title: MediaTek PCIESYS clock and reset controller
10 The MediaTek PCIESYS controller provides various clocks to the system.
19 - const: mediatek,mt7622-pciesys
21 - const: mediatek,mt7629-pciesys
43 compatible = "mediatek,mt7622-pciesys", "syscon";
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dmediatek-pcie.txt226 clocks = <&pciesys CLK_PCIE_P0_MAC_EN>,
227 <&pciesys CLK_PCIE_P0_AHB_EN>,
228 <&pciesys CLK_PCIE_P0_AUX_EN>,
229 <&pciesys CLK_PCIE_P0_AXI_EN>,
230 <&pciesys CLK_PCIE_P0_OBFF_EN>,
231 <&pciesys CLK_PCIE_P0_PIPE_EN>;
263 clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
265 <&pciesys CLK_PCIE_P0_AHB_EN>,
266 <&pciesys CLK_PCIE_P1_AUX_EN>,
267 <&pciesys CLK_PCIE_P1_AXI_EN>,
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7622.dtsi792 pciesys: clock-controller@1a100800 { label
793 compatible = "mediatek,mt7622-pciesys";
814 clocks = <&pciesys CLK_PCIE_P0_MAC_EN>,
815 <&pciesys CLK_PCIE_P0_AHB_EN>,
816 <&pciesys CLK_PCIE_P0_AUX_EN>,
817 <&pciesys CLK_PCIE_P0_AXI_EN>,
818 <&pciesys CLK_PCIE_P0_OBFF_EN>,
819 <&pciesys CLK_PCIE_P0_PIPE_EN>;
851 clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
853 <&pciesys CLK_PCIE_P0_AHB_EN>,
[all …]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7629.dtsi356 pciesys: syscon@1a100800 { label
357 compatible = "mediatek,mt7629-pciesys", "syscon";
378 clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
379 <&pciesys CLK_PCIE_P0_AHB_EN>,
380 <&pciesys CLK_PCIE_P1_AUX_EN>,
381 <&pciesys CLK_PCIE_P1_AXI_EN>,
382 <&pciesys CLK_PCIE_P1_OBFF_EN>,
383 <&pciesys CLK_PCIE_P1_PIPE_EN>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dmt7629-clk.h173 /* PCIESYS */
H A Dmt7622-clk.h243 /* PCIESYS */