xref: /freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,pciesys.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel VadotMediaTek PCIESYS controller
2*c66ec88fSEmmanuel Vadot============================
3*c66ec88fSEmmanuel Vadot
4*c66ec88fSEmmanuel VadotThe MediaTek PCIESYS controller provides various clocks to the system.
5*c66ec88fSEmmanuel Vadot
6*c66ec88fSEmmanuel VadotRequired Properties:
7*c66ec88fSEmmanuel Vadot
8*c66ec88fSEmmanuel Vadot- compatible: Should be:
9*c66ec88fSEmmanuel Vadot	- "mediatek,mt7622-pciesys", "syscon"
10*c66ec88fSEmmanuel Vadot	- "mediatek,mt7629-pciesys", "syscon"
11*c66ec88fSEmmanuel Vadot- #clock-cells: Must be 1
12*c66ec88fSEmmanuel Vadot- #reset-cells: Must be 1
13*c66ec88fSEmmanuel Vadot
14*c66ec88fSEmmanuel VadotThe PCIESYS controller uses the common clk binding from
15*c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/clock/clock-bindings.txt
16*c66ec88fSEmmanuel VadotThe available clocks are defined in dt-bindings/clock/mt*-clk.h.
17*c66ec88fSEmmanuel Vadot
18*c66ec88fSEmmanuel VadotExample:
19*c66ec88fSEmmanuel Vadot
20*c66ec88fSEmmanuel Vadotpciesys: pciesys@1a100800 {
21*c66ec88fSEmmanuel Vadot	compatible = "mediatek,mt7622-pciesys", "syscon";
22*c66ec88fSEmmanuel Vadot	reg = <0 0x1a100800 0 0x1000>;
23*c66ec88fSEmmanuel Vadot	#clock-cells = <1>;
24*c66ec88fSEmmanuel Vadot	#reset-cells = <1>;
25*c66ec88fSEmmanuel Vadot};
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