| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | faraday,ftpci100.txt | 1 Faraday Technology FTPCI100 PCI Host Bridge 3 This PCI bridge is found inside that Cortina Systems Gemini SoC platform and 5 plain and dual PCI. The plain version embeds a cascading interrupt controller 9 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 14 - compatible: ranging from specific to generic, should be one of 15 "cortina,gemini-pci", "faraday,ftpci100" 16 "cortina,gemini-pci-dual", "faraday,ftpci100-dual" 18 "faraday,ftpci100-dual" 19 - reg: memory base and size for the host bridge 20 - #address-cells: set to <3> [all …]
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| H A D | v3-v360epc-pci.txt | 1 V3 Semiconductor V360 EPC PCI bridge 6 - compatible: should be one of: 7 "v3,v360epc-pci" 8 "arm,integrator-ap-pci", "v3,v360epc-pci" 9 - reg: should contain two register areas: 12 - interrupts: should contain a reference to the V3 error interrupt 14 - bus-range: see pci.txt 15 - ranges: this follows the standard PCI bindings in the IEEE Std 16 1275-1994 (see pci.txt) with the following restriction: 17 - The non-prefetchable and prefetchable memory windows must [all …]
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| H A D | nvidia,tegra20-pcie.txt | 4 - compatible: Must be: 5 - "nvidia,tegra20-pcie": for Tegra20 6 - "nvidia,tegra30-pcie": for Tegra30 7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132 8 - "nvidia,tegra210-pcie": for Tegra210 9 - "nvidia,tegra186-pcie": for Tegra186 10 - power-domains: To ungate power partition by BPMP powergate driver. Must 13 - device_type: Must be "pci" 14 - reg: A list of physical base address and length for each set of controller 15 registers. Must contain an entry for each entry in the reg-names property. [all …]
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| H A D | faraday,ftpci100.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/faraday,ftpci100.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Faraday Technology FTPCI100 PCI Host Bridge 10 - Linus Walleij <linus.walleij@linaro.org> 13 This PCI bridge is found inside that Cortina Systems Gemini SoC platform and 15 plain and dual PCI. The plain version embeds a cascading interrupt controller 18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 21 The plain variant has 128MiB of non-prefetchable memory space, whereas the [all …]
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| H A D | host-generic-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic PCI host controller 10 - Will Deacon <will@kernel.org> 13 Firmware-initialised PCI host controllers and PCI emulations, such as the 14 virtio-pci implementations found in kvmtool and other para-virtualised 21 Configuration Space is assumed to be memory-mapped (as opposed to being 23 geography of a PCI bus address by concatenating the various components to [all …]
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| H A D | versatile.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/versatile.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Versatile Platform Baseboard PCI interface 10 - Rob Herring <robh@kernel.org> 13 PCI host controller found on the ARM Versatile PB board's FPGA. 16 - $ref: /schemas/pci/pci-host-bridge.yaml# 20 const: arm,versatile-pci 24 - description: Versatile-specific registers [all …]
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| H A D | nvidia,tegra194-pcie.txt | 4 and thus inherits all the common properties defined in snps,dw-pcie.yaml and 5 snps,dw-pcie-ep.yaml. 10 - power-domains: A phandle to the node that controls power to the respective 20 "include/dt-bindings/power/tegra194-powergate.h" file. 21 - reg: A list of physical base address and length pairs for each set of 22 controller registers. Must contain an entry for each entry in the reg-names 24 - reg-names: Must include the following entries: 26 "config": As per the definition in snps,dw-pcie.yaml 32 - interrupts: A list of interrupt outputs of the controller. Must contain an 33 entry for each entry in the interrupt-names property. [all …]
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| H A D | xilinx-nwl-pcie.txt | 4 - compatible: Should contain "xlnx,nwl-pcie-2.11" 5 - #address-cells: Address representation for root ports, set to <3> 6 - #size-cells: Size representation for root ports, set to <2> 7 - #interrupt-cells: specifies the number of cells needed to encode an 9 - reg: Should contain Bridge, PCIe Controller registers location, 11 - reg-names: Must include the following entries: 15 - device_type: must be "pci" 16 - interrupts: Should contain NWL PCIe interrupt 17 - interrupt-names: Must include the following entries: 21 - interrupt-map-mask and interrupt-map: standard PCI properties to define the [all …]
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| /freebsd/usr.sbin/pciconf/ |
| H A D | err.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 36 #include <dev/pci/pcireg.h> 45 /* Error indicators in the PCI status register (PCIR_STATUS). */ 48 { PCIM_STATUS_STABORT, "Sent Target-Abort" }, 49 { PCIM_STATUS_RTABORT, "Received Target-Abort" }, 50 { PCIM_STATUS_RMABORT, "Received Master-Abort" }, 61 /* Error indicators in the PCI-Express device status register. */ 64 { PCIEM_STA_NON_FATAL_ERROR, "Non-Fatal Error Detected" }, 70 /* Valid error indicator bits in the PCI-Express device status register. */ [all …]
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| H A D | pciconf.8 | 31 .Nd diagnostic utility for the PCI bus 47 .Xr pci 4 52 .Pa /dev/pci , 53 normally only the super-user. 59 lists PCI devices in the following format: 60 .Bd -literal 72 .Tn PCI 80 hex digits, followed by the sub-class and the interface bytes. 86 .Tn PCI 88 .Tn PCI [all …]
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | pci_ids | 2 #------------------------------------------------------------------------------ 4 # pci.ids: file(1) magic for PCI specific informations 7 # Vendor identification (ID) https://pci-ids.ucw.cz/v2.2/pci.ids 8 # show hexadecimal PCI vendor identification in human readable text form 9 0 name PCI-vendor 42 # https://blog.ladsai.com/pci-configuration-space-class-code.html 43 # Base class code https://wiki.osdev.org/PCI 44 # show hexadecimal PCI class+sub+ProgIF identification in human readable text form 45 0 name PCI-class 50 # Any device except for VGA-Compatible devices like: 2975BIOS.BIN Trm3x5.bin [all …]
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| /freebsd/sys/powerpc/ofw/ |
| H A D | ofw_pcibus.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pci_private.h> 85 /* PCI interface */ 100 DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods, 104 MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1); 107 TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only); 113 if (ofw_bus_get_node(dev) == -1) in ofw_pcibus_probe() [all …]
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| /freebsd/sys/dev/bhnd/bhndb/ |
| H A D | bhndb_pcireg.h | 1 /*- 27 * Common PCI/PCIE Bridge Configuration Registers. 32 * in BHND PCI/PCIE bridge cores: 36 * - PCI (cid=0x804, revision <= 12) 42 * [0x1800+0x0E00] fixed pci core device registers 43 * [0x1E00+0x0200] fixed pci core siba config registers 47 * - PCI (cid=0x804, revision >= 13) 48 * - PCIE (cid=0x820) with ChipCommon (revision <= 31) 54 * [0x2000+0x1000] fixed pci/pcie core registers 59 * - PCIE (cid=0x820) with ChipCommon (revision >= 32) [all …]
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| /freebsd/sys/powerpc/conf/ |
| H A D | GENERIC64 | 2 # GENERIC64 -- Generic kernel configuration file for FreeBSD/powerpc64 7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config 25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols 33 options PSERIES # PAPR-compliant systems (e.g. IBM p) 34 options POWERNV # Non-virtualized OpenPOWER systems 38 options NUMA # Non-Uniform Memory Architecture support 55 options UFS_GJOURNAL # Enable gjournal-based UFS journaling 66 options PSEUDOFS # Pseudo-filesystem framework 83 options SYSVSHM # SYSV-style shared memory 84 options SYSVMSG # SYSV-style message queues [all …]
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| H A D | GENERIC64LE | 2 # GENERIC64LE -- Generic kernel configuration file for FreeBSD/powerpc64le 7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config 25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols 31 options PSERIES # PAPR-compliant systems (e.g. IBM p) 32 options POWERNV # Non-virtualized OpenPOWER systems 37 options NUMA # Non-Uniform Memory Architecture support 53 options UFS_GJOURNAL # Enable gjournal-based UFS journaling 64 options PSEUDOFS # Pseudo-filesystem framework 79 options SYSVSHM # SYSV-style shared memory 80 options SYSVMSG # SYSV-style message queues [all …]
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| /freebsd/share/man/man9/ |
| H A D | pci.9 | 30 .Nm pci , 78 .Nd PCI bus interface 197 set of functions are used for managing PCI devices. 208 function is used to read data from the PCI configuration 221 to the PCI configuration 232 function is used to modify the value of a register in the PCI-express 251 function is used to read the value of a register in the PCI-express 264 to a register in the PCI-express capability register set of device 275 .Fn pci 282 of a PCI device, given its [all …]
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| /freebsd/sys/dts/arm/ |
| H A D | annapurna-alpine.dts | 1 /*- 28 /dts-v1/; 32 #address-cells = <1>; 33 #size-cells = <1>; 40 #address-cells = <1>; 41 #size-cells = <0>; 45 compatible = "arm,cortex-a15"; 47 d-cache-line-size = <64>; // 64 bytes 48 i-cache-line-size = <64>; // 64 bytes 49 d-cache-size = <0x8000>; // L1, 32K [all …]
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| /freebsd/share/man/man4/ |
| H A D | pci.4 | 29 .Nm pci 30 .Nd generic PCI/PCIe bus driver 32 To compile the PCI bus driver into the kernel, 35 .Bd -ragged -offset indent 36 .Cd device pci 40 .Pq SR-IOV : 41 .Bd -ragged -offset indent 45 To compile in support for native PCI-express HotPlug: 46 .Bd -ragged -offset indent 53 .Tn PCI [all …]
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| H A D | ntb_hw_plx.4 | 2 .\" Copyright (c) 2017-2019 Alexander Motin <mav@FreeBSD.org> 31 .Nd PLX/Avago/Broadcom Non-Transparent Bridge driver 35 .Bd -ragged -offset indent 42 .Bd -literal -offset indent 48 .Bl -ohang 51 NTB that it works in NTB-to-NTB (back-to-back) mode, 0 -- NTB-to-Root Port. 53 NTB-to-Root Port mode automatically, but one attached to Virtual Interface 57 Lookup Table (A-LUT). 62 driver provides support for the Non-Transparent Bridge (NTB) hardware in 64 switched from transparent to non-transparent bridge mode. [all …]
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| H A D | le.4 | 3 .\"- 8 .\" at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 47 .Bd -ragged -offset indent 54 .Bd -literal -offset indent 58 For ISA non-PnP adapters, the port address as well as the IRQ and the DRQ 78 .Pq CMOS, pin-compatible 91 family of chips, which are single-chip implementations of a 97 .Tn PCI 99 .Tn AMD Am79C970 PCnet-PCI 101 .Tn AMD Am79C971 PCnet-FAST [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-pxa-pci-ce4100.txt | 2 ---------- 4 CE4100 has one PCI device which is described as the I2C-Controller. This 5 PCI device has three PCI-bars, each bar contains a complete I2C 6 controller. So we have a total of three independent I2C-Controllers 8 The driver is probed via the PCI-ID and is gathering the information of 10 Grant Likely recommended to use the ranges property to map the PCI-Bar 15 ranges describes how the parent pci address space 22 non-zero if you had 2 or more devices mapped off 30 ------------------------------------------------ 31 i2c-controller@b,2 { [all …]
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| /freebsd/sys/dev/bhnd/nvram/ |
| H A D | bhnd_nvram.h | 1 /*- 2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org> 42 * BHND NVRAM boolean type; guaranteed to be exactly 8-bits, representing 53 BHND_NVRAM_SRC_OTP, /**< On-chip one-time-programmable 69 * table, and earlier PCI(e) devices map 70 * SPROM statically into PCI BARs, and the 71 * control registers into PCI config space. 74 * devices that are attached via PCI(e) to 88 * All primitive (non-array) constants should be representable as a 4-bit 89 * integer (e.g. 0-15) to support SPROM_OPCODE_TYPE_IMM encoding as used by [all …]
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| /freebsd/sys/dev/pci/ |
| H A D | pcib_if.m | 1 #- 30 #include <dev/pci/pcivar.h> 31 #include <dev/pci/pcib_private.h> 55 # Return the number of slots on the attached PCI bus. 63 # Return the number of functions on the attached PCI bus. 70 # Read configuration space on the PCI bus. The bus, slot and func 86 # Write configuration space on the PCI bus. The bus, slot and func 139 # Allocate a single MSI-X message mapped onto '*irq'. 148 # Release a single MSI-X message mapped onto 'irq'. 157 # Determine the MSI/MSI-X message address and data for 'irq'. The address [all …]
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| /freebsd/sys/dev/bhnd/cores/pci/ |
| H A D | bhnd_pcivar.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 40 * Shared PCI Bridge/PCI Host Bridge definitions. 65 /** PCI register block layouts. */ 67 BHND_PCI_REGFMT_PCI = 0, /* PCI register definitions */ 68 BHND_PCI_REGFMT_PCIE = 1, /* PCIe-Gen1 register definitions */ 71 /** PCI (base driver) quirks */ 74 * The PCIe SerDes requires use of a non-standard Clause 22 88 * Generic PCI bridge/end-point driver state. 93 device_t dev; /**< pci device */ [all …]
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| /freebsd/sys/contrib/dev/acpica/components/hardware/ |
| H A D | hwpci.c | 3 * Module Name: hwpci - Obtain PCI bus, device, and function numbers 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 108 * any of its subsidiaries will export/re-export any technical data, process, 130 * 3. Neither the names of the above-listed copyright holders nor the names 160 /* PCI configuration space values */ 166 /* PCI header values */ 209 * PARAMETERS: PciId - Initial values for the PCI ID. May be [all …]
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