| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FMV.td | 40 def : FMVExtension<"aes", "FEAT_AES", "+fp-armv8,+neon", 150>; 46 def : FMVExtension<"dotprod", "FEAT_DOTPROD", "+dotprod,+fp-armv8,+neon", 104>; 50 def : FMVExtension<"f32mm", "FEAT_SVE_F32MM", "+sve,+f32mm,+fullfp16,+fp-armv8,+neon", 350>; 51 def : FMVExtension<"f64mm", "FEAT_SVE_F64MM", "+sve,+f64mm,+fullfp16,+fp-armv8,+neon", 360>; 52 def : FMVExtension<"fcma", "FEAT_FCMA", "+fp-armv8,+neon,+complxnum", 220>; 55 def : FMVExtension<"fp", "FEAT_FP", "+fp-armv8,+neon", 90>; 56 def : FMVExtension<"fp16", "FEAT_FP16", "+fullfp16,+fp-armv8,+neon", 170>; 57 def : FMVExtension<"fp16fml", "FEAT_FP16FML", "+fp16fml,+fullfp16,+fp-armv8,+neon", 175>; 60 def : FMVExtension<"jscvt", "FEAT_JSCVT", "+fp-armv8,+neon,+jsconv", 210>; 69 def : FMVExtension<"pmull", "FEAT_PMULL", "+aes,+fp-armv8,+neon", 160>; [all …]
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 6501 { #NameBase, NEON::BI__builtin_neon_ ## NameBase, 0, 0, 0 } 6504 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 6508 { #NameBase, NEON:: BI__builtin_neon_ ## NameBase, \ 7347 { NEON::BI__builtin_neon_splat_lane_bf16, NEON::BI__builtin_neon_splat_lane_v, }, 7348 { NEON::BI__builtin_neon_splat_laneq_bf16, NEON::BI__builtin_neon_splat_laneq_v, }, 7349 { NEON::BI__builtin_neon_splatq_lane_bf16, NEON::BI__builtin_neon_splatq_lane_v, }, 7350 { NEON::BI__builtin_neon_splatq_laneq_bf16, NEON::BI__builtin_neon_splatq_laneq_v, }, 7351 { NEON::BI__builtin_neon_vabd_f16, NEON::BI__builtin_neon_vabd_v, }, 7352 { NEON::BI__builtin_neon_vabdq_f16, NEON::BI__builtin_neon_vabdq_v, }, 7353 { NEON::BI__builtin_neon_vabs_f16, NEON::BI__builtin_neon_vabs_v, }, [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFeatures.td | 30 // Floating Point, HW Division and Neon Support 99 def FeatureNEON : SubtargetFeature<"neon", "HasNEON", "true", 100 "Enable NEON instructions", 257 // Some targets (e.g. Cortex-A9) prefer VMOVSR to VMOVDRR even when using NEON 269 // Some targets (e.g. Cortex-A9) have muxed AGU and NEON/FPU. 270 // True if the AGU and NEON/FPU units are multiplexed. 273 "Has muxed AGU and NEON/FPU">; 302 // True if splat a register between VFP and NEON instructions. 303 def FeatureSplatVFPToNeon : SubtargetFeature<"splat-vfp-neon", 305 "Splat register from VFP to NEON", [all …]
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| H A D | ARMInstrVFP.td | 163 // Some single precision VFP instructions may be executed on both NEON and VFP 198 // Some single precision VFP instructions may be executed on both NEON and VFP 266 // Some single precision VFP instructions may be executed on both NEON and 279 // Some single precision VFP instructions may be executed on both NEON and 292 // Some single precision VFP instructions may be executed on both NEON and 438 // Some single precision VFP instructions may be executed on both NEON and 463 // Some single precision VFP instructions may be executed on both NEON and 509 // Some single precision VFP instructions may be executed on both NEON and 534 // Some single precision VFP instructions may be executed on both NEON and 619 // Some single precision VFP instructions may be executed on both NEON and [all …]
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| H A D | ARMInstrFormats.td | 133 def NeonDomain : Domain<2>; // Instructions in Neon domain only 134 def VFPNeonDomain : Domain<3>; // Instructions in both VFP & Neon domains 135 def VFPNeonA8Domain : Domain<5>; // Instructions in VFP & Neon under A8 1633 // Loads & stores operate on both NEON and VFP pipelines. 1658 // Loads & stores operate on both NEON and VFP pipelines. 1684 // Loads & stores operate on both NEON and VFP pipelines. 1957 // Single precision unary, if no NEON. Same as ASuI except not available if 1958 // NEON is enabled. 2021 // Single precision binary, if no NEON. Same as ASbI except not available if 2022 // NEON is enabled. [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCAsmInfo.cpp | 28 "aarch64-neon-syntax", cl::init(Default), 29 cl::desc("Choose style of NEON code to emit from AArch64 backend:"), 30 cl::values(clEnumValN(Generic, "generic", "Emit generic NEON assembly"), 31 clEnumValN(Apple, "apple", "Emit Apple-style NEON assembly"))); 34 // We prefer NEON instructions to be printed in the short, Apple-specific in AArch64MCAsmInfoDarwin() 72 // We prefer NEON instructions to be printed in the generic form when in AArch64MCAsmInfoELF()
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| /freebsd/sys/arm/include/ |
| H A D | vfp.h | 123 #define VMVFR1_FMAC_MASK (0xf0000000) /* Neon FMAC support */ 127 #define VMVFR1_HP_MASK (0x00f00000) /* Neon half prec support */ 129 #define VMVFR1_SP_MASK (0x000f0000) /* Neon single prec support */ 131 #define VMVFR1_I_MASK (0x0000f000) /* Neon integer support */ 133 #define VMVFR1_LS_MASK (0x00000f00) /* Neon ld/st instr support */ 135 #define VMVFR1_DN_MASK (0x000000f0) /* Neon prop NaN support */ 136 #define VMVFR1_FZ_MASK (0x0000000f) /* Neon denormal arith supp */
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| H A D | pcb.h | 65 struct vfp_state pcb_vfpstate; /* VP/NEON state */ 66 u_int pcb_vfpcpu; /* VP/NEON last cpu */ 70 struct vfp_state *pcb_vfpsaved; /* VP/NEON state */
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | TargetBuiltins.h | 26 namespace NEON { 40 LastNEONBuiltin = NEON::FirstTSBuiltin - 1, 49 LastNEONBuiltin = NEON::FirstTSBuiltin - 1, 71 LastNEONBuiltin = NEON::FirstTSBuiltin - 1, 72 FirstSVEBuiltin = NEON::FirstTSBuiltin, 177 /// Flags to identify the types for overloaded Neon builtins.
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| H A D | BuiltinsNEON.def | 1 //===--- BuiltinsNEON.def - NEON Builtin function database ------*- C++ -*-===// 9 // This file defines the NEON-specific builtin function database. Users of
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| H A D | arm_neon.td | 1 //===--- arm_neon.td - ARM NEON compiler interface ------------------------===// 9 // This file defines the TableGen definitions from which the ARM NEON header 292 let TargetGuard = "bf16,neon" in { 326 let TargetGuard = "v8.1a,neon" in { 542 // Note that the ARM NEON Reference 2.0 mistakenly document the vget_high_f16() 617 let TargetGuard = "v8.1a,neon" in { 960 let TargetGuard = "aes,neon" in { 1094 let ArchGuard = "defined(__aarch64__) || defined(__arm64ec__)", TargetGuard = "v8.1a,neon" in { 1125 let ArchGuard = "__ARM_ARCH >= 8", TargetGuard = "aes,neon" in { 1132 let ArchGuard = "__ARM_ARCH >= 8", TargetGuard = "sha2,neon" in { [all …]
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| H A D | arm_neon_incl.td | 1 //===--- arm_neon_incl.td - ARM NEON compiler interface -------------------===// 83 // - A typedef string - A NEON or stdint.h type that is then parsed. 131 // NEON intrinsic type as given to (cast). 144 // operators plus some extra operators defined in the NEON emitter. 268 string TargetGuard = "neon";
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| /freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
| H A D | ARMTargetParser.h | 154 // An FPU name implies one of three levels of Neon support: 156 None = 0, ///< No Neon 157 Neon, ///< Neon enumerator 158 Crypto ///< Neon with Crypto
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| H A D | ARMTargetParser.def | 55 ARM_FPU("neon", FK_NEON, FPUVersion::VFPV3, NeonSupportLevel::Neon, 57 ARM_FPU("neon-fp16", FK_NEON_FP16, FPUVersion::VFPV3_FP16, 58 NeonSupportLevel::Neon, FPURestriction::None) 59 ARM_FPU("neon-vfpv4", FK_NEON_VFPV4, FPUVersion::VFPV4, NeonSupportLevel::Neon, 61 ARM_FPU("neon-fp-armv8", FK_NEON_FP_ARMV8, FPUVersion::VFPV5, 62 NeonSupportLevel::Neon, FPURestriction::None) 63 ARM_FPU("crypto-neon-fp-armv8", FK_CRYPTO_NEON_FP_ARMV8, FPUVersion::VFPV5,
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| /freebsd/crypto/openssl/crypto/bn/asm/ |
| H A D | armv4-gf2m.pl | 22 # integer code suitable for any ARMv4 and later CPU and NEON code 27 # length, more for longer keys. Even though NEON 1x1 multiplication 29 # longer keys. One has to optimize code elsewhere to get NEON glow... 38 # Polynomial Multiplication on ARM Processors using the NEON Engine. 259 .fpu neon 324 .asciz "GF(2^m) Multiplication for ARMv4/NEON, CRYPTOGAMS by <appro\@openssl.org>"
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| /freebsd/sys/contrib/openzfs/include/os/linux/kernel/linux/ |
| H A D | simd_arm.h | 53 #include <asm/neon.h> 70 * Check if NEON is available
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| H A D | simd_aarch64.h | 56 #include <asm/neon.h> 84 * Check if NEON is available
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| /freebsd/contrib/llvm-project/lldb/source/Utility/ |
| H A D | ARM_DWARF_Registers.h | 154 // VFP-v3/Neon 188 // Neon quadword registers
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| /freebsd/contrib/llvm-project/llvm/lib/Support/BLAKE3/ |
| H A D | README.md | 281 ## ARM NEON 283 The NEON implementation is enabled by default on AArch64, but not on 287 To explicitiy disable using NEON instructions on AArch64, set
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| /freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/ |
| H A D | OHOS.cpp | 41 // -mfpu=neon-vfpv4 in findOHOSMuslMultilibs() 47 {"-mcpu=cortex-a7", "-mfloat-abi=softfp", "-mfpu=neon-vfpv4"})); in findOHOSMuslMultilibs() 51 {"-mcpu=cortex-a7", "-mfloat-abi=hard", "-mfpu=neon-vfpv4"})); in findOHOSMuslMultilibs() 73 IsMFPU = A->getValue() == StringRef("neon-vfpv4"); in findOHOSMultilibs() 74 addMultilibFlag(IsMFPU, "-mfpu=neon-vfpv4", Flags); in findOHOSMultilibs()
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| /freebsd/sys/contrib/openzfs/config/ |
| H A D | kernel-fpu.m4 | 83 #include <asm/neon.h> 115 dnl # ARM neon symbols (only on arm and arm64)
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| /freebsd/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | TableGen.cpp | 228 clEnumValN(GenArmNeon, "gen-arm-neon", "Generate arm_neon.h for clang"), 233 clEnumValN(GenArmNeonSema, "gen-arm-neon-sema", 234 "Generate ARM NEON sema support for clang"), 235 clEnumValN(GenArmNeonTest, "gen-arm-neon-test", 236 "Generate ARM NEON tests for clang"),
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| /freebsd/contrib/llvm-project/llvm/lib/TargetParser/ |
| H A D | ARMTargetParser.cpp | 204 {"+neon", "-neon", NeonSupportLevel::Neon}, in getFPUFeatures() 246 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. in getFPUSynonym() 247 .Case("neon-vfpv3", "neon") in getFPUSynonym()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 512 // This is used for NEON load / store instructions. 522 // NEON/MVE Modified Immediates 525 // Several NEON and MVE instructions (e.g., VMOV) take a "modified immediate" 527 // specifies a full NEON vector value. These modified immediates are 541 /// decodeVMOVModImm - Decode a NEON/MVE modified immediate value into the 600 // Encode NEON 16 bits Splat immediate for instructions like VBIC/VORR 602 assert(isNEONi16splat(Value) && "Invalid NEON splat value"); in encodeNEONi16splat() 616 /// Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR. 618 assert(isNEONi32splat(Value) && "Invalid NEON splat value"); in encodeNEONi32splat()
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| H A D | ARMTargetStreamer.cpp | 222 /* NEON is not exactly a VFP architecture, but GAS emit one of in emitTargetAttributes() 223 * neon/neon-fp-armv8/neon-vfpv4/vfpv3/vfpv2 for .fpu parameters */ in emitTargetAttributes()
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