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/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_hsi_debug_tools.h228 BIN_BUF_DBG_DUMP_MEM /* GRC Dump memories */,
843 DBG_GRC_PARAM_DUMP_TSTORM /* dump Tstorm memories (0/1) */,
844 DBG_GRC_PARAM_DUMP_MSTORM /* dump Mstorm memories (0/1) */,
845 DBG_GRC_PARAM_DUMP_USTORM /* dump Ustorm memories (0/1) */,
846 DBG_GRC_PARAM_DUMP_XSTORM /* dump Xstorm memories (0/1) */,
847 DBG_GRC_PARAM_DUMP_YSTORM /* dump Ystorm memories (0/1) */,
848 DBG_GRC_PARAM_DUMP_PSTORM /* dump Pstorm memories (0/1) */,
853 DBG_GRC_PARAM_DUMP_VFC /* dump VFC memories (0/1) */,
855 DBG_GRC_PARAM_DUMP_PXP /* dump PXP memories (0/1) */,
856 DBG_GRC_PARAM_DUMP_RSS /* dump RSS memories (0/1) */,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml61 memories are placed into power-down mode if bus is idle for PD_IDLE DFI
70 which memories are placed into self-refresh mode if bus is idle for
80 Memories are placed into self-refresh mode and memory controller clock
89 Defines the self-refresh power down idle period in which memories are
99 Defines the standby idle period in which memories are placed into
288 period in which memories are placed into power-down mode if bus is idle
294 period in which memories are placed into self-refresh mode if bus is idle
301 Memories are placed into self-refresh mode and memory controller clock
306 Defines the self-refresh power down idle period in which memories are
312 Defines the standby idle period in which memories ar
[all...]
H A Datmel,ebi.txt4 asynchronous (NAND, NOR, SRAM, ....) and synchronous memories (SDR/DDR SDRAMs).
5 The EBI provides a glue-less interface to asynchronous memories through the SMC
H A Dti-aemif.txt5 ASRA M, NOR and NAND memory. A total of 256M bytes of any of these memories
7 per chip select. Synchronous memories such as DDR1 SD RAM, SDR SDRAM
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-peripheral-props.yaml91 stacked-memories:
92 description: Several SPI memories can be wired in stacked mode.
103 parallel-memories:
104 description: Several SPI memories can be wired in parallel mode.
107 different memories (eg. even bits are stored in one memory, odd
H A Dsocionext,f-ospi.yaml11 memories using the SPI communication interface.
H A Damlogic,meson6-spifc.yaml18 NOR memories, without DMA support and a 64-byte unified transmit /
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dxlnx,zynqmp-r5fss.yaml45 tightly coupled memories (TCM). System memory is cacheable, but the TCM
48 Each RPU contains one 64KB memory and two 32KB memories that
81 the main DDR memory, and other system memories.
90 remoteproc device. This is variable and describes the memories shared with
H A Dst,stm32-rproc.yaml23 Address ranges of the RETRAM and MCU SRAM memories used by the remote
100 remoteproc device. This is variable and describes the memories shared with
H A Dti,pru-rproc.yaml132 pruss_mem: memories@0 {
171 icssg0_mem: memories@0 {
H A Drenesas,rcar-rproc.yaml31 remoteproc device. This is variable and describes the memories shared with
/freebsd/sys/contrib/device-tree/Bindings/devfreq/
H A Drk3399_dmc.txt35 power-down idle period in which memories are
40 self-refresh idle period in which memories are
47 clock gating idle period. Memories are placed
53 period in which memories are placed into
59 memories are placed into self-refresh mode.
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dti,pruss.yaml34 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
51 processor cores, the memories node, an INTC node and an MDIO node represented
97 memories@[a-f0-9]+$:
100 single node with the name 'memories'.
318 # - memories
357 pruss_mem: memories@0 {
441 pruss1_mem: memories@0 {
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam57-pruss.dtsi36 pruss1_mem: memories@0 {
145 pruss2_mem: memories@0 {
/freebsd/contrib/llvm-project/llvm/include/llvm/Object/
H A DWasm.h147 ArrayRef<wasm::WasmLimits> memories() const { return Memories; } in memories() function
285 std::vector<wasm::WasmLimits> Memories; variable
/freebsd/sys/contrib/device-tree/Bindings/arm/freescale/
H A Dfsl,imx7ulp-pm.txt7 controlling the power, clocks, and memories of the MCU to achieve the
H A Dfsl,imx7ulp-pm.yaml16 controlling the power, clocks, and memories of the MCU to achieve the
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dqcom,ebi2.txt10 NOR flash memories), WE (write enable). This on top of 6 different chip selects
39 flag somewhere for 8bit memories.
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ddr/
H A Dlpddr2-timings.txt1 * AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
H A Dlpddr3-timings.txt1 * AC timing parameters of LPDDR3 memories for a given speed-bin.
/freebsd/sys/contrib/device-tree/Bindings/ddr/
H A Dlpddr2-timings.txt1 * AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
H A Dlpddr3-timings.txt1 * AC timing parameters of LPDDR3 memories for a given speed-bin.
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/fsl/
H A Dimx8m-ddrc.yaml14 memories.
/freebsd/sys/contrib/device-tree/Bindings/arm/stm32/
H A Dst,mlahb.yaml15 a Cortex-M subsystem with dedicated memories. The MCU SRAM and RETRAM memory
/freebsd/contrib/llvm-project/llvm/tools/llvm-readobj/
H A DWasmDumper.cpp197 ListScope Group(W, "Memories"); in printSectionHeaders()
198 for (const wasm::WasmLimits &Memory : Obj->memories()) { in printSectionHeaders()

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