Searched full:mx1 (Results 1 – 25 of 26) sorted by relevance
12
| /linux/drivers/clk/imx/ |
| H A D | clk-pllv1.c | 22 * PLL clock version 1, found on i.MX1/21/25/27/31/35
66 * frequency. PLLs with this register layout can be found on i.MX1, in clk_pllv1_recalc_rate()
84 * On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit in clk_pllv1_recalc_rate()
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | imx1-clock.yaml | 7 title: Freescale i.MX1 CPUs Clock Controller
15 for the full list of i.MX1 clock IDs.
|
| /linux/arch/arm/mach-imx/ |
| H A D | Kconfig | 60 bool "i.MX1 support"
64 This enables support for Freescale i.MX1 processor
|
| H A D | mach-imx1.c | 21 DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
|
| H A D | hardware.h | 40 * mx1:
|
| /linux/drivers/gpu/drm/imx/lcdc/ |
| H A D | Kconfig | 10 Found on i.MX1, i.MX21, i.MX25 and i.MX27.
|
| /linux/drivers/clocksource/ |
| H A D | timer-imx-gpt.c | 22 * - MX1/MXL
28 GPT_TYPE_IMX1, /* i.MX1 */
39 /* MX1, MX21, MX27 */
|
| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx1-ads.dts | 10 model = "Freescale MX1 ADS";
|
| H A D | imx1-pinfunc.h | 29 * 'pin' is an integer between 0 and 0xbf. i.MX1 has 4 ports with 32
|
| /linux/Documentation/devicetree/bindings/display/imx/ |
| H A D | fsl,imx-lcdc.yaml | 7 title: Freescale i.MX LCD Controller, found on i.MX1, i.MX21, i.MX25 and i.MX27
|
| /linux/drivers/watchdog/ |
| H A D | imx2_wdt.c | 11 * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
13 * MX1: MX2+:
|
| /linux/drivers/soc/imx/ |
| H A D | soc-imx.c | 57 soc_id = "i.MX1"; in imx_soc_device_init()
|
| /linux/drivers/pwm/ |
| H A D | pwm-imx1.c | 197 MODULE_DESCRIPTION("i.MX1 and i.MX21 Pulse Width Modulator driver");
|
| H A D | Kconfig | 281 tristate "i.MX1 PWM support"
285 Generic PWM framework driver for i.MX1 and i.MX21
|
| /linux/drivers/pinctrl/freescale/ |
| H A D | pinctrl-imx1.c | 3 // i.MX1 pinctrl driver based on imx pinmux core
|
| H A D | pinctrl-imx1-core.c | 39 * MX1 register offsets
|
| /linux/drivers/bus/ |
| H A D | imx-weim.c | 77 /* i.MX1/21 */
|
| /linux/drivers/mmc/host/ |
| H A D | mxcmmc.c | 6 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
7 * Unlike the hardware found on MX1, this hardware just works and does
|
| /linux/drivers/dma/ |
| H A D | Kconfig | 279 Freescale i.MX1/21/27 chips.
|
| H A D | imx-dma.c | 6 // found on i.MX1/21/27
|
| /linux/drivers/tty/serial/ |
| H A D | imx.c | 54 #define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */
78 #define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */
179 /* i.MX21 type uart runs on all i.mx except i.MX1 and i.MX6q */
2591 * Allocate the IRQ(s) i.MX1 has three interrupts whereas later in imx_uart_probe()
|
| /linux/drivers/gpio/ |
| H A D | gpio-mxc.c | 276 /* MX1 and MX3 has one interrupt *per* gpio port */
|
| /linux/drivers/video/fbdev/ |
| H A D | imxfb.c | 530 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt in imxfb_enable_controller()
|
| H A D | Kconfig | 150 tristate "Freescale i.MX1/21/25/27 LCD support"
|
| /linux/drivers/spi/ |
| H A D | spi-imx.c | 211 /* MX1, MX31, MX35, MX51 CSPI */
|
12