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/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8188-clock.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt8188-clock.yaml#
7 title: MediaTek Functional Clock Controller for MT8188
25 - mediatek,mt8188-adsp-audio26m
26 - mediatek,mt8188-camsys
27 - mediatek,mt8188-camsys-rawa
28 - mediatek,mt8188-camsys-rawb
29 - mediatek,mt8188-camsys-yuva
30 - mediatek,mt8188-camsys-yuvb
31 - mediatek,mt8188-ccusys
32 - mediatek,mt8188-imgsys
[all …]
H A Dmediatek,mt8188-sys-clock.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt8188-sys-clock.yaml#
7 title: MediaTek System Clock Controller for MT8188
30 - mediatek,mt8188-apmixedsys
31 - mediatek,mt8188-infracfg-ao
32 - mediatek,mt8188-pericfg-ao
33 - mediatek,mt8188-topckgen
55 compatible = "mediatek,mt8188-topckgen", "syscon";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8188-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
7 title: MediaTek MT8188 Pin Controller
13 The MediaTek's MT8188 Pin controller is used to control SoC pins.
17 const: mediatek,mt8188-pinctrl
96 defined as macros in dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h
109 description: mt8188 pull down PUPD/R0/R1 type define value.
111 description: mt8188 pull down RSEL type define value.
113 description: mt8188 pull down RSEL type si unit value(ohm).
120 "MTK_PUPD_SET_R1R0_11" define in mt8188.
128 mt8188
[all...]
/linux/drivers/clk/mediatek/
H A DMakefile113 obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o \
114 clk-mt8188-peri_ao.o clk-mt8188-infra_ao.o
115 obj-$(CONFIG_COMMON_CLK_MT8188_ADSP_AUDIO26M) += clk-mt8188-adsp_audio26m.o
116 obj-$(CONFIG_COMMON_CLK_MT8188_CAMSYS) += clk-mt8188-cam.o clk-mt8188-ccu.o
117 obj-$(CONFIG_COMMON_CLK_MT8188_IMGSYS) += clk-mt8188-img.o
118 obj-$(CONFIG_COMMON_CLK_MT8188_IMP_IIC_WRAP) += clk-mt8188-imp_iic_wrap.o
119 obj-$(CONFIG_COMMON_CLK_MT8188_IPESYS) += clk-mt8188-ipe.o
120 obj-$(CONFIG_COMMON_CLK_MT8188_MFGCFG) += clk-mt8188-mfg.o
121 obj-$(CONFIG_COMMON_CLK_MT8188_VDECSYS) += clk-mt8188-vdec.o
122 obj-$(CONFIG_COMMON_CLK_MT8188_VDOSYS) += clk-mt8188-vdo0.o clk-mt8188-vdo1.o
[all …]
H A Dclk-mt8188-imp_iic_wrap.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
65 { .compatible = "mediatek,mt8188-imp-iic-wrap-c", .data = &imp_iic_wrap_c_desc },
66 { .compatible = "mediatek,mt8188-imp-iic-wrap-w", .data = &imp_iic_wrap_w_desc },
67 { .compatible = "mediatek,mt8188-imp-iic-wrap-en", .data = &imp_iic_wrap_en_desc },
76 .name = "clk-mt8188-imp_iic_wrap",
83 MODULE_DESCRIPTION("MediaTek MT8188 I2C Wrapper clocks driver");
H A Dclk-mt8188-vdec.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
76 { .compatible = "mediatek,mt8188-vdecsys-soc", .data = &vdec1_desc },
77 { .compatible = "mediatek,mt8188-vdecsys", .data = &vdec2_desc },
86 .name = "clk-mt8188-vdec",
93 MODULE_DESCRIPTION("MediaTek MT8188 Video Decoders clocks driver");
H A Dclk-mt8188-adsp_audio26m.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
36 { .compatible = "mediatek,mt8188-adsp-audio26m", .data = &adsp_audio26m_desc },
45 .name = "clk-mt8188-adsp_audio26m",
51 MODULE_DESCRIPTION("MediaTek MT8188 AudioDSP clocks driver");
H A Dclk-mt8188-ccu.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
35 { .compatible = "mediatek,mt8188-ccusys", .data = &ccu_desc },
44 .name = "clk-mt8188-ccu",
50 MODULE_DESCRIPTION("MediaTek MT8188 Camera Control Unit clocks driver");
H A Dclk-mt8188-venc.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
41 { .compatible = "mediatek,mt8188-vencsys", .data = &venc1_desc },
50 .name = "clk-mt8188-venc1",
56 MODULE_DESCRIPTION("MediaTek MT8188 Video Encoders clocks driver");
H A Dclk-mt8188-wpe.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
89 { .compatible = "mediatek,mt8188-wpesys", .data = &wpe_top_desc },
90 { .compatible = "mediatek,mt8188-wpesys-vpp0", .data = &wpe_vpp0_desc },
99 .name = "clk-mt8188-wpe",
105 MODULE_DESCRIPTION("MediaTek MT8188 Warp Engine clocks driver");
H A Dclk-mt8188-peri_ao.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
45 { .compatible = "mediatek,mt8188-pericfg-ao", .data = &peri_ao_desc },
54 .name = "clk-mt8188-peri_ao",
60 MODULE_DESCRIPTION("MediaTek MT8188 pericfg clocks driver");
H A Dclk-mt8188-mfg.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
34 { .compatible = "mediatek,mt8188-mfgcfg", .data = &mfgcfg_desc },
43 .name = "clk-mt8188-mfgcfg",
H A Dclk-mt8188-vdo0.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
93 { .name = "clk-mt8188-vdo0", .driver_data = (kernel_ulong_t)&vdo0_desc },
102 .name = "clk-mt8188-vdo0",
108 MODULE_DESCRIPTION("MediaTek MT8188 Video Output 0 clocks driver");
H A Dclk-mt8188-vpp0.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
100 { .name = "clk-mt8188-vpp0", .driver_data = (kernel_ulong_t)&vpp0_desc },
109 .name = "clk-mt8188-vpp0",
115 MODULE_DESCRIPTION("MediaTek MT8188 Video Processing Pipe 0 clocks driver");
H A Dclk-mt8188-vpp1.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
95 { .name = "clk-mt8188-vpp1", .driver_data = (kernel_ulong_t)&vpp1_desc },
104 .name = "clk-mt8188-vpp1",
110 MODULE_DESCRIPTION("MediaTek MT8188 Video Processing Pipe 1 clocks driver");
H A Dclk-mt8188-infra_ao.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
8 #include <dt-bindings/reset/mt8188-resets.h>
209 { .compatible = "mediatek,mt8188-infracfg-ao", .data = &infra_ao_desc },
218 .name = "clk-mt8188-infra_ao",
224 MODULE_DESCRIPTION("MediaTek MT8188 infracfg clocks driver");
/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml82 - mediatek,mt8188-iommu-vdo # generation two
83 - mediatek,mt8188-iommu-vpp # generation two
84 - mediatek,mt8188-iommu-infra # generation two
133 dt-binding/memory/mediatek,mt8188-memory-port.h for mt8188,
169 - mediatek,mt8188-iommu-vdo
170 - mediatek,mt8188-iommu-vpp
186 - mediatek,mt8188-iommu-vdo
187 - mediatek,mt8188-iommu-vpp
216 - mediatek,mt8188-iommu-infra
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,padding.yaml25 - mediatek,mt8188-disp-padding
28 - const: mediatek,mt8188-mdp3-padding
72 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
73 #include <dt-bindings/power/mediatek,mt8188-power.h>
81 compatible = "mediatek,mt8188-disp-padding";
/linux/arch/arm64/boot/dts/mediatek/
H A DMakefile149 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-evb.dtb
150 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku0.dtb
151 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku1.dtb
152 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku2.dtb
153 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku3.dtb
154 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku4.dtb
155 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku5.dtb
156 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku6.dtb
157 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-geralt-ciri-sku7.dtb
H A Dmt8390-grinn-genio-700-sbc.dts8 #include "mt8188.dtsi"
14 compatible = "grinn,genio-700-sbc", "mediatek,mt8390", "mediatek,mt8188";
/linux/sound/soc/mediatek/mt8188/
H A Dmt8188-audsys-clk.c3 * mt8188-audsys-clk.c -- MediaTek 8188 audsys clock control
12 #include "mt8188-afe-common.h"
13 #include "mt8188-audsys-clk.h"
14 #include "mt8188-audsys-clkid.h"
15 #include "mt8188-reg.h"
/linux/Documentation/devicetree/bindings/net/
H A Dmediatek-dwmac.yaml22 - mediatek,mt8188-gmac
43 - mediatek,mt8188-gmac
89 For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,
99 For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple
/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt8188-afe.yaml4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml#
7 title: MediaTek AFE PCM controller for mt8188
14 const: mediatek,mt8188-afe
180 compatible = "mediatek,mt8188-afe";
/linux/sound/soc/mediatek/
H A DKconfig229 tristate "ASoC support for MediaTek MT8188 chip"
235 This adds ASoC platform driver support for MediaTek MT8188 chip
241 tristate "ASoC Audio driver for MT8188 with MT6359 and I2S codecs"
254 This adds support for ASoC machine driver for MediaTek MT8188
/linux/sound/soc/sof/mediatek/mt8186/
H A Dmt8186.c507 /* mt8188 ops */
523 .compatible = "mediatek,mt8188",
524 .sof_tplg_filename = "sof-mt8188.tplg",
540 [SOF_IPC_TYPE_3] = "sof-mt8188.ri",
542 .nocodec_tplg_filename = "sof-mt8188-nocodec.tplg",
549 { .compatible = "mediatek,mt8188-dsp", .data = &sof_of_mt8188_desc},
568 MODULE_DESCRIPTION("SOF support for MT8186/MT8188 platforms");

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