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/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_switch_map.h216 /* 16B for Host Egress MSMC Q (Pre-emptible) context */
228 /* 16B for Host Egress MSMC Q (Express) context */
H A Dicssg_config.h142 __le32 addr_lo; /* MSMC Buffer pool base address low. */
143 __le32 addr_hi; /* MSMC Buffer pool base address high. Must be 0 */
H A Dicssg_prueth.h232 * @sram_pool: MSMC RAM pool for buffers
233 * @msmcram: MSMC RAM region
H A Dicssg_prueth_sr1.c470 /* clear SMEM and MSMC settings for all slices */ in emac_ndo_open()
1005 dev_err(dev, "unable to allocate MSMC resource\n"); in prueth_probe()
H A Dicssg_prueth.c552 /* clear SMEM and MSMC settings for all slices */ in emac_ndo_open()
1467 dev_err(dev, "unable to allocate MSMC resource\n"); in prueth_probe()
/linux/Documentation/devicetree/bindings/arm/freescale/
H A Dfsl,imx7ulp-pm.yaml13 The Multi-System Mode Controller (MSMC) is responsible for sequencing
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65.dtsi59 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
H A Dk3-j7200.dtsi120 <0x00 0x70000000 0x00 0x70000000 0x00 0x00800000>, /* MSMC RAM */
H A Dk3-j721s2.dtsi127 <0x00 0x70000000 0x00 0x70000000 0x00 0x00400000>, /* MSMC RAM */
H A Dk3-j721e.dtsi134 <0x00 0x70000000 0x00 0x70000000 0x00 0x00800000>, /* MSMC RAM */
/linux/Documentation/devicetree/bindings/net/
H A Dti,icssg-prueth.yaml26 phandle to MSMC SRAM node
/linux/drivers/soc/ti/
H A Dknav_qmss_queue.c1152 * in MSMC SRAM), the actual memory used is 0x0c000000-0x0c020000, in knav_get_link_ram()