| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | msi.txt | 1 This document describes the generic device tree binding for MSI controllers and 9 those busses to the MSI controllers which they are capable of using, 14 - The doorbell (the MMIO address written to). 17 they can address. An MSI controller may feature a number of doorbells. 19 - The payload (the value written to the doorbell). 22 MSI controllers may have restrictions on permitted payloads. 24 - Sideband information accompanying the write. 28 MSI controller and device rather than a property of either in isolation). 31 MSI controllers: 34 An MSI controller signals interrupts to a CPU when a write is made to an MMIO [all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | brcm,stb-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jim Quinlan <james.quinlan@broadcom.com> 15 - enum: 16 - brcm,bcm2711-pcie # The Raspberry Pi 4 17 - brcm,bcm2712-pcie # Raspberry Pi 5 18 - brcm,bcm4908-pcie 19 - brcm,bcm7211-pcie # Broadcom STB version of RPi4 [all …]
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| H A D | baikal,bt1-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Baikal-T1 PCIe Root Port Controller 10 - Serge Semin <fancer.lancer@gmail.com> 13 Embedded into Baikal-T1 SoC Root Complex controller with a single port 14 activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured 15 to have just a single Root Port function and is capable of establishing the 18 performed by software. There four in- and four outbound iATU regions [all …]
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| H A D | xlnx,nwl-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/xlnx,nwl-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thippeswamy Havalige <thippeswamy.havalige@amd.com> 13 - $ref: /schemas/pci/pci-host-bridge.yaml# 14 - $ref: /schemas/interrupt-controller/msi-controller.yaml# 18 const: xlnx,nwl-pcie-2.11 22 - description: PCIe bridge registers location. 23 - description: PCIe Controller registers location. [all …]
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| H A D | snps,dw-pcie.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 16 # Please create a separate DT-schema for your DWC PCIe Root Port controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie 23 - compatible [all …]
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| H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 23 Interface - DBI. In accordance with the reference manual the register 24 configuration space belongs to the Configuration-Dependent Module (CDM) 25 and is split up into several sub-parts Standard PCIe configuration 26 space, Port Logic Registers (PL), Shadow Config-space Registers, [all …]
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| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | marvell,xor-v2.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/dma/marvell,xor-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 15 - const: marvell,xor-v2 16 - items: 17 - enum: 18 - marvell,armada-7k-xor 19 - const: marvell,xor-v2 [all …]
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| /linux/drivers/ata/ |
| H A D | ahci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * ahci.h - Common AHCI SATA definitions and declarations 6 * Please ALWAYS copy linux-ide@vger.kernel.org 9 * Copyright 2004-2005 Red Hat, Inc. 12 * as Documentation/driver-api/libata.rst 80 HOST_RESET = BIT(0), /* reset controller; self-clear */ 82 HOST_MRSM = BIT(2), /* MSI Revert to Single Message */ 89 HOST_CAP_PART = BIT(13), /* Partial state capable */ 90 HOST_CAP_SSC = BIT(14), /* Slumber state capable */ 92 HOST_CAP_FBS = BIT(16), /* FIS-based switching support */ [all …]
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| /linux/include/uapi/linux/ |
| H A D | pci_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz> 25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of 26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of 50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */ 59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ 83 #define PCI_HEADER_TYPE_MFD 0x80 /* Multi-Function Device (possible) */ 88 #define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */ 124 /* 0x35-0x3b are reserved */ 130 /* Header type 1 (PCI-to-PCI bridges) */ [all …]
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| /linux/drivers/pci/msi/ |
| H A D | msi.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PCI Message Signaled Interrupt (MSI) 5 * Copyright (C) 2003-2004 Intel 16 #include "msi.h" 21 * pci_msi_supported - check whether MSI may be enabled on a device 22 * @dev: pointer to the pci_dev data structure of MSI device function 26 * to determine if MSI/-X are supported for the device. If MSI/-X is 33 /* MSI must be globally enabled and supported by the device */ in pci_msi_supported() 37 if (!dev || dev->no_msi) in pci_msi_supported() 49 * Any bridge which does NOT route MSI transactions from its in pci_msi_supported() [all …]
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| H A D | api.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PCI MSI/MSI-X — Exported APIs for device drivers 5 * Copyright (C) 2003-2004 Intel 14 #include "msi.h" 17 * pci_enable_msi() - Enable MSI interrupt mode on device 20 * Legacy device driver API to enable MSI interrupts mode on device and 22 * Linux IRQ will be saved at @dev->irq. The driver must invoke 40 * pci_disable_msi() - Disable MSI interrupt mode on device 43 * Legacy device driver API to disable MSI interrupt mode on device, 45 * The PCI device Linux IRQ (@dev->irq) is restored to its default [all …]
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| /linux/drivers/pci/controller/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 30 tristate "Altera PCIe MSI feature" 35 Say Y here if you want PCIe MSI support for the Altera FPGA. 36 This MSI driver supports Altera MSI to GIC controller IP. 52 system-on-chips, like the Apple M1. This is required for the USB 53 type-A ports, Ethernet, Wi-Fi, and Bluetooth. 101 bool "Broadcom iProc PCIe MSI support" 107 Say Y here if you want to enable MSI support for Broadcom's iProc 111 bool "Cavium Thunder PCIe controller to off-chip devices" 119 bool "Cavium Thunder ECAM controller to on-chip devices on pass-1.x silicon" [all …]
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| H A D | pcie-brcmstb.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Copyright (C) 2009 - 2019 Broadcom */ 15 #include <linux/irqchip/irq-msi-lib.h> 21 #include <linux/msi.h> 27 #include <linux/pci-ecam.h> 38 /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ 171 #define BRCM_INT_PCI_MSI_MASK GENMASK(BRCM_INT_PCI_MSI_NR - 1, 0) 173 32 - BRCM_INT_PCI_MSI_LEGACY_NR) 175 /* MSI target addresses */ 201 #define IDX_ADDR(pcie) ((pcie)->cfg->offsets[EXT_CFG_INDEX]) [all …]
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| /linux/Documentation/PCI/ |
| H A D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 :Authors: - Martin Mares <mj@ucw.cz> 8 - Grant Grundler <grundler@parisc-linux.org> 11 Since each CPU architecture implements different chip-sets and PCI devices 18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman. 26 "Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list. 38 supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver]. 45 - Enable the device 46 - Request MMIO/IOP resources 47 - Set the DMA mask size (for both coherent and streaming DMA) [all …]
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-pci | 4 Contact: linux-pci@vger.kernel.org 15 (Note: kernels before 2.6.28 may require echo -n). 20 Contact: linux-pci@vger.kernel.org 31 (Note: kernels before 2.6.28 may require echo -n). 36 Contact: linux-pci@vger.kernel.org 55 Contact: Chris Wright <chrisw@sous-sol.org> 72 Contact: Linux PCI developers <linux-pci@vger.kernel.org> 74 Writing a non-zero value to this attribute will 76 re-discover previously removed devices. 80 Contact: Linux PCI developers <linux-pci@vger.kernel.org> [all …]
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| /linux/include/xen/interface/ |
| H A D | physdev.h | 1 /* SPDX-License-Identifier: MIT */ 10 * @args == Operation-specific extra arguments (NULL if none). 14 * Notify end-of-interrupt (EOI) for the specified IRQ. 75 * Set the current VCPU's I/O-port permissions bitmap. 86 * Read or write an IO-APIC register. 127 /* IN - high 16 bits hold segment for ..._MSI_SEG and ..._MULTI_MSI */ 132 * - For MSI-X contains entry number. 133 * - For MSI with ..._MULTI_MSI contains number of vectors. 135 * - Number of vectors allocated. 255 * MSI-X capable devices won't (prepare) or may (release) change. [all …]
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| /linux/arch/um/drivers/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 14 The User-Mode Linux environment allows you to create virtual serial 18 See <http://user-mode-linux.sourceforge.net/old/input.html> for more 44 lines to host pseudo-terminals. Access to both traditional 45 pseudo-terminals (/dev/pty*) and pts pseudo-terminals are controlled 55 (/dev/tty*) and the slave side of pseudo-terminals (/dev/ttyp* and 107 traditional pseudo-terminals. 131 This User-Mode Linux network driver uses multi-message send 147 drivers over vhost-user sockets. 156 rtcwake, especially in time-travel mode. This driver enables that [all …]
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| /linux/include/linux/ |
| H A D | msi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 * This header file contains MSI data structures and functions which are 8 * - Interrupt core code 9 * - PCI/MSI core code 10 * - MSI interrupt domain implementations 11 * - IOMMU, low level VFIO, NTB and other justified exceptions 12 * dealing with low level MSI details. 15 * especially storing MSI descriptor pointers in random code is considered 26 #include <asm/msi.h> 52 * msi_msg - Representation of a MSI message [all …]
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| /linux/Documentation/arch/x86/ |
| H A D | sva.rst | 1 .. SPDX-License-Identifier: GPL-2.0 19 application page-faults. For more information please refer to the PCIe 34 Unlike Single Root I/O Virtualization (SR-IOV), Scalable IOV (SIOV) permits 40 ID (PASID), which is a 20-bit number defined by the PCIe SIG. 43 IOMMU to track I/O on a per-PASID granularity in addition to using the PCIe 55 ENQCMD works with non-posted semantics and carries a status back if the 67 A new thread-scoped MSR (IA32_PASID) provides the connection between 69 accesses an SVA-capable device, this MSR is initialized with a newly 70 allocated PASID. The driver for the device calls an IOMMU-specific API 71 that sets up the routing for DMA and page-requests. [all …]
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| /linux/drivers/pci/ |
| H A D | pci-sysfs.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Hewlett-Packard 30 #include <linux/msi.h> 50 return sysfs_emit(buf, format_string, pdev->field); \ 69 * For MSI, show the first MSI IRQ; for all other cases including in irq_show() 70 * MSI-X, show the legacy INTx IRQ. in irq_show() 72 if (pdev->msi_enabled) in irq_show() 76 return sysfs_emit(buf, "%u\n", pdev->irq); in irq_show() [all …]
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| /linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | cxgb3_main.c | 2 * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved. 14 * - Redistributions of source code must retain the above 18 * - Redistributions in binary form must reproduce the above 38 #include <linux/dma-mapping.h> 77 #define PORT_MASK ((1 << MAX_NPORTS) - 1) 99 CH_DEVICE(0x35, 6), /* T3C20-derived T3C10 */ 100 CH_DEVICE(0x36, 3), /* S320E-CR */ 101 CH_DEVICE(0x37, 7), /* N320E-G2 */ 117 * order MSI-X, MSI, legacy pin interrupts. This parameter determines which 120 * msi = 2: choose from among all three options [all …]
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| /linux/Documentation/PCI/endpoint/ |
| H A D | pci-test-howto.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 This document is a guide to help users use pci-epf-test function driver 17 --------------------------- 31 ------------------------- 35 # ls /sys/bus/pci-epf/drivers 44 Creating pci-epf-test Device 45 ---------------------------- 48 pci-epf-test device, the following commands can be used:: 50 # mount -t configfs none /sys/kernel/config 54 The "mkdir func1" above creates the pci-epf-test function device that will [all …]
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| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_device_types.h | 1 /* SPDX-License-Identifier: MIT */ 3 * Copyright © 2022-2023 Intel Corporation 47 #define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100) 48 #define MEDIA_VER(xe) ((xe)->info.media_verx100 / 100) 49 #define GRAPHICS_VERx100(xe) ((xe)->info.graphics_verx100) 50 #define MEDIA_VERx100(xe) ((xe)->info.media_verx100) 51 #define IS_DGFX(xe) ((xe)->info.is_dgfx) 62 ((_xe)->info.platform == (_platform) && \ 63 (_xe)->info.step.graphics >= (min_step) && \ 64 (_xe)->info.step.graphics < (max_step)) [all …]
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| /linux/drivers/net/ethernet/netronome/nfp/ |
| H A D | nfp_net_ctrl.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */ 17 /* 64-bit per app capabilities */ 23 * THB-350, 32k needs to be reserved. 61 /* Hash type pre-pended when a RSS hash was computed */ 80 /* Read/Write config words (0x0000 - 0x002c) 87 * %NFP_NET_CFG_EXN: MSI-X table entry for exceptions 88 * %NFP_NET_CFG_LSC: MSI-X table entry for link state changes 92 * - define Error details in UPDATE 108 #define NFP_NET_CFG_CTRL_RXQINQ (0x1 << 13) /* Enable S-tag strip */ [all …]
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| /linux/kernel/irq/ |
| H A D | msi.c | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <linux/msi.h> 26 * struct msi_device_data - MSI per device data 27 * @properties: MSI properties which are interesting to drivers 28 * @mutex: Mutex protecting the MSI descriptor store 29 * @__domains: Internal data for per device MSI domains 40 * struct msi_ctrl - MSI internal management control structure 45 * than the range due to PCI/multi-MSI. 55 #define MSI_XA_MAX_INDEX (ULONG_MAX - 1) 66 * msi_alloc_desc - Allocate an initialized msi_desc [all …]
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