| /linux/drivers/firmware/xilinx/ |
| H A D | Kconfig | 4 menu "Zynq MPSoC Firmware Drivers"
8 bool "Enable Xilinx Zynq MPSoC firmware interface"
20 bool "Enable Xilinx Zynq MPSoC firmware debug APIs"
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| H A D | zynqmp-debug.h | 3 * Xilinx Zynq MPSoC Firmware layer
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| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | xlnx,zynqmp-reset.yaml | 7 title: Zynq UltraScale+ MPSoC and Versal reset
13 The Zynq UltraScale+ MPSoC and Versal has several different resets.
24 For list of all valid reset indices for Zynq UltraScale+ MPSoC
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| /linux/Documentation/devicetree/bindings/fpga/ |
| H A D | xlnx,zynqmp-pcap-fpga.yaml | 7 title: Xilinx Zynq Ultrascale MPSoC FPGA Manager
13 Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
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| /linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | xlnx,zynqmp-nvmem.yaml | 7 title: Zynq UltraScale+ MPSoC Non Volatile Memory interface
10 The ZynqMP MPSoC provides access to the hardware related data
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| /linux/Documentation/devicetree/bindings/rtc/ |
| H A D | xlnx,zynqmp-rtc.yaml | 7 title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
10 RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
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| /linux/Documentation/driver-api/xilinx/ |
| H A D | eemi.rst | 2 Xilinx Zynq MPSoC EEMI Documentation
5 Xilinx Zynq MPSoC Firmware Interface
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| /linux/Documentation/devicetree/bindings/firmware/xilinx/ |
| H A D | xlnx,zynqmp-firmware.yaml | 23 - description: For implementations complying for Zynq Ultrascale+ MPSoC.
67 description: The ZynqMP MPSoC provides access to the hardware related data
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| /linux/drivers/pmdomain/xilinx/ |
| H A D | Kconfig | 4 bool "Enable Zynq MPSoC generic PM domains"
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| /linux/drivers/clk/zynqmp/ |
| H A D | Makefile | 2 # Zynq Ultrascale+ MPSoC clock specific Makefile
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| H A D | clk-gate-zynqmp.c | 3 * Zynq UltraScale+ MPSoC clock controller
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| H A D | clk-mux-zynqmp.c | 3 * Zynq UltraScale+ MPSoC mux
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| H A D | clkc.c | 3 * Zynq UltraScale+ MPSoC clock controller
675 pr_err("Zynq Ultrascale+ MPSoC clk %s: register failed with %ld\n", in zynqmp_register_clocks()
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| H A D | divider.c | 3 * Zynq UltraScale+ MPSoC Divider support
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| H A D | pll.c | 3 * Zynq UltraScale+ MPSoC PLL driver
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| /linux/drivers/soc/xilinx/ |
| H A D | Kconfig | 5 bool "Enable Xilinx Zynq MPSoC Power Management driver"
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-zynqmp-qspi.yaml | 7 title: Xilinx Zynq UltraScale+ MPSoC GQSPI controller
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| /linux/arch/arm64/boot/dts/xilinx/ |
| H A D | xlnx-zynqmp-clk.h | 3 * Xilinx Zynq MPSoC Firmware layer
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| /linux/include/dt-bindings/clock/ |
| H A D | xlnx-zynqmp-clk.h | 3 * Xilinx Zynq MPSoC Firmware layer
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| /linux/drivers/rtc/ |
| H A D | rtc-zynqmp.c | 3 * Xilinx Zynq Ultrascale+ MPSoC Real Time Clock Driver
414 MODULE_DESCRIPTION("Xilinx Zynq MPSoC RTC driver");
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| H A D | Kconfig | 1378 tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
1382 Xilinx Zynq Ultrascale+ MPSoC.
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | xlnx,zynqmp-ipi-mailbox.yaml | 11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
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| /linux/Documentation/devicetree/bindings/display/xlnx/ |
| H A D | xlnx,zynqmp-dpsub.yaml | 10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC)
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| /linux/include/linux/firmware/ |
| H A D | xlnx-zynqmp.h | 3 * Xilinx Zynq MPSoC Firmware layer
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| /linux/drivers/ata/ |
| H A D | Kconfig | 230 It can be found on the Xilinx Zynq UltraScale+ MPSoC.
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