| /linux/drivers/net/ethernet/sfc/falcon/ |
| H A D | mdio_10g.c | 31 int ef4_mdio_reset_mmd(struct ef4_nic *port, int mmd, in ef4_mdio_reset_mmd() argument 39 ef4_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET); in ef4_mdio_reset_mmd() 43 ctrl = ef4_mdio_read(port, mmd, MDIO_CTRL1); in ef4_mdio_reset_mmd() 51 static int ef4_mdio_check_mmd(struct ef4_nic *efx, int mmd) in ef4_mdio_check_mmd() argument 55 if (mmd != MDIO_MMD_AN) { in ef4_mdio_check_mmd() 56 /* Read MMD STATUS2 to check it is responding. */ in ef4_mdio_check_mmd() 57 status = ef4_mdio_read(efx, mmd, MDIO_STAT2); in ef4_mdio_check_mmd() 60 "PHY MMD %d not responding.\n", mmd); in ef4_mdio_check_mmd() 81 int mmd = 0; in ef4_mdio_wait_reset_mmds() local 86 stat = ef4_mdio_read(efx, mmd, MDIO_CTRL1); in ef4_mdio_wait_reset_mmds() [all …]
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| H A D | txc43128_phy.c | 182 /* Reset the PMA/PMD MMD. The documentation is explicit that this does a 204 /* Run a single BIST on one MMD */ 205 static int txc_bist_one(struct ef4_nic *efx, int mmd, int test) in txc_bist_one() argument 219 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, bctl); in txc_bist_one() 223 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, bctl); in txc_bist_one() 226 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, in txc_bist_one() 234 ef4_mdio_write(efx, mmd, TXC_BIST_CTL, bctl); in txc_bist_one() 238 bctl = ef4_mdio_read(efx, mmd, TXC_BIST_CTL); in txc_bist_one() 243 int count = ef4_mdio_read(efx, mmd, TXC_BIST_RX0ERRCNT + lane); in txc_bist_one() 249 count = ef4_mdio_read(efx, mmd, TXC_BIST_RX0FRMCNT + lane); in txc_bist_one() [all …]
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| H A D | mdio_10g.h | 33 static inline u32 ef4_mdio_read_id(struct ef4_nic *efx, int mmd) in ef4_mdio_read_id() argument 35 u16 id_low = ef4_mdio_read(efx, mmd, MDIO_DEVID2); in ef4_mdio_read_id() 36 u16 id_hi = ef4_mdio_read(efx, mmd, MDIO_DEVID1); in ef4_mdio_read_id() 56 const char *ef4_mdio_mmd_name(int mmd); 59 * Reset a specific MMD and wait for reset to clear. 64 int ef4_mdio_reset_mmd(struct ef4_nic *efx, int mmd, int spins, int spintime);
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| H A D | qt202x_phy.c | 317 /* Reset the PHYXS MMD. This is documented as doing in qt202x_reset_phy() 461 int mmd, reg_base, rc, i; in qt202x_phy_get_module_eeprom() local 464 mmd = MDIO_MMD_PCS; in qt202x_phy_get_module_eeprom() 467 mmd = MDIO_MMD_PMAPMD; in qt202x_phy_get_module_eeprom() 472 rc = ef4_mdio_read(efx, mmd, reg_base + ee->offset + i); in qt202x_phy_get_module_eeprom()
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| /linux/rust/kernel/net/phy/ |
| H A D | reg.rs | 33 /// dev.read(C45::new(Mmd::PMAPMD, 0)); 85 /// MMD Register control. 87 /// MMD Register address data. 139 pub struct Mmd(u8); struct 141 impl Mmd { impl 143 pub const PMAPMD: Self = Mmd(uapi::MDIO_MMD_PMAPMD as u8); 145 pub const WIS: Self = Mmd(uapi::MDIO_MMD_WIS as u8); 147 pub const PCS: Self = Mmd(uapi::MDIO_MMD_PCS as u8); 149 pub const PHYXS: Self = Mmd(uapi::MDIO_MMD_PHYXS as u8); 151 pub const DTEXS: Self = Mmd(uapi::MDIO_MMD_DTEXS as u8); [all …]
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| /linux/drivers/net/dsa/sja1105/ |
| H A D | sja1105_mdio.c | 10 int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg) in sja1105_pcs_mdio_read_c45() argument 18 addr = (mmd << 16) | reg; in sja1105_pcs_mdio_read_c45() 20 if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) in sja1105_pcs_mdio_read_c45() 23 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID1) in sja1105_pcs_mdio_read_c45() 25 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID2) in sja1105_pcs_mdio_read_c45() 35 int sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, in sja1105_pcs_mdio_write_c45() argument 43 addr = (mmd << 16) | reg; in sja1105_pcs_mdio_write_c45() 46 if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) in sja1105_pcs_mdio_write_c45() 52 int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg) in sja1110_pcs_mdio_read_c45() argument 65 addr = (mmd << 16) | reg; in sja1110_pcs_mdio_read_c45() [all …]
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| /linux/drivers/net/ethernet/aquantia/atlantic/ |
| H A D | aq_phy.c | 26 u16 aq_mdio_read_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr) in aq_mdio_read_word() argument 28 u16 phy_addr = aq_hw->phy_id << 5 | mmd; in aq_mdio_read_word() 52 void aq_mdio_write_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr, u16 data) in aq_mdio_write_word() argument 54 u16 phy_addr = aq_hw->phy_id << 5 | mmd; in aq_mdio_write_word() 78 u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address) in aq_phy_read_reg() argument 91 err = aq_mdio_read_word(aq_hw, mmd, address); in aq_phy_read_reg() 99 void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data) in aq_phy_write_reg() argument 109 aq_mdio_write_word(aq_hw, mmd, address, data); in aq_phy_write_reg()
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| H A D | aq_phy.h | 22 u16 aq_mdio_read_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr); 24 void aq_mdio_write_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr, u16 data); 26 u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address); 28 void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data);
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| /linux/drivers/net/ethernet/intel/e1000e/ |
| H A D | ich8lan.h | 253 #define I82579_EEE_PCS_STATUS 0x182E /* IEEE MMD Register 3.1 >> 8 */ 254 #define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */ 255 #define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */ 256 #define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */ 260 #define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */ 261 #define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */ 262 #define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */ 263 #define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */
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| /linux/drivers/net/mdio/ |
| H A D | mdio-ipq4019.c | 68 static int ipq4019_mdio_read_c45(struct mii_bus *bus, int mii_id, int mmd, in ipq4019_mdio_read_c45() argument 84 /* issue the phy address and mmd */ in ipq4019_mdio_read_c45() 85 writel((mii_id << 8) | mmd, priv->membase + MDIO_ADDR_REG); in ipq4019_mdio_read_c45() 141 static int ipq4019_mdio_write_c45(struct mii_bus *bus, int mii_id, int mmd, in ipq4019_mdio_write_c45() argument 157 /* issue the phy address and mmd */ in ipq4019_mdio_write_c45() 158 writel((mii_id << 8) | mmd, priv->membase + MDIO_ADDR_REG); in ipq4019_mdio_write_c45()
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| /linux/drivers/net/ethernet/chelsio/cxgb/ |
| H A D | cphy.h | 101 static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg, in cphy_mdio_read() argument 104 int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd, in cphy_mdio_read() 110 static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg, in cphy_mdio_write() argument 113 return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd, in cphy_mdio_write()
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | broadcom-bcm87xx.txt | 10 is the MDIO Manageable Device (MMD) address, the second a register 11 address within the MMD, the third cell contains a mask to be ANDed
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| /linux/Documentation/devicetree/bindings/net/pcs/ |
| H A D | snps,dw-xpcs.yaml | 53 MMD '[20:16]', Reg '[15:0]'. In the later case the space is divided 56 the CSR address MMD+REG[20:8] is supposed to be written in there
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| /linux/drivers/net/phy/ |
| H A D | phy-c45.c | 317 * are controlled through the PMA/PMD MMD registers. 337 * This assumes that the auto-negotiation MMD is present. 358 * This assumes that the auto-negotiation MMD is present. 391 * This assumes that the auto-negotiation MMD is present. 393 * Reads the status register from the auto-negotiation MMD, returning: 520 * in @phydev. This assumes that the auto-negotiation MMD is present, and 943 /* Writing MMD AN advertisements while autoneg is disabled has no in genphy_c45_an_config_eee_aneg() 1293 * the current PLCA configuration from the standard registers in MMD 31. 1347 * the PLCA configuration using the standard registers in MMD 31. 1461 * the current PLCA status information from the standard registers in MMD 31.
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| /linux/tools/bpf/bpftool/ |
| H A D | Makefile | 271 $(QUIET_CC)$(CC) $(CFLAGS) -c -MMD $< -o $@ 280 $(QUIET_CC)$(HOSTCC) $(HOST_CFLAGS) -c -MMD $< -o $@ 283 $(QUIET_CC)$(CC) $(CFLAGS) -c -MMD $< -o $@
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | radio_2055.h | 69 #define B2055_RF_MMDIDAC1 0x3D /* RF MMD IDAC 1 */ 70 #define B2055_RF_MMDIDAC0 0x3E /* RF MMD IDAC 0 */ 71 #define B2055_RF_MMDSP 0x3F /* RF MMD spare */
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| /linux/tools/testing/vsock/ |
| H A D | Makefile | 12 …e -Wno-pointer-sign -fno-strict-overflow -fno-strict-aliasing -fno-common -MMD -U_FORTIFY_SOURCE -…
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| /linux/drivers/net/ethernet/samsung/sxgbe/ |
| H A D | sxgbe_mdio.c | 139 * @devad: device (MMD) address 181 * @devad: device (MMD) address
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| /linux/scripts/ |
| H A D | Makefile.host | 83 hostc_flags = -Wp,-MMD,$(depfile) \ 86 hostcxx_flags = -Wp,-MMD,$(depfile) \
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| H A D | Makefile.userprogs | 19 user_ccflags = -Wp,-MMD,$(depfile) $(KBUILD_USERCFLAGS) $(userccflags) \
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-net-phydev | 29 What: /sys/class/mdio_bus/<bus>/<device>/c45_phy_ids/mmd<n>_device_id
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| /linux/drivers/net/ethernet/ |
| H A D | oa_tc6.c | 84 #define OA_TC6_PHY_C45_PCS_MMS2 2 /* MMD 3 */ 85 #define OA_TC6_PHY_C45_PMA_PMD_MMS3 3 /* MMD 1 */ 86 #define OA_TC6_PHY_C45_VS_PLCA_MMS4 4 /* MMD 31 */ 87 #define OA_TC6_PHY_C45_AUTO_NEG_MMS5 5 /* MMD 7 */ 88 #define OA_TC6_PHY_C45_POWER_UNIT_MMS6 6 /* MMD 13 */
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| /linux/tools/virtio/ |
| H A D | Makefile | 18 …/ -Wno-pointer-sign -fno-strict-overflow -fno-strict-aliasing -fno-common -MMD -U_FORTIFY_SOURCE -…
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| /linux/scripts/gcc-plugins/ |
| H A D | Makefile | 29 plugin_cxxflags = -Wp,-MMD,$(depfile) $(KBUILD_HOSTCXXFLAGS) -fPIC \
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| /linux/drivers/net/pcs/ |
| H A D | pcs-xpcs.h | 56 /* VR MII MMD registers offsets */
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