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/linux/sound/pci/aw2/
H A Daw2-saa7146.c45 WRITEREG((MRST_N << 16), MC1); in snd_aw2_saa7146_free()
87 WRITEREG((MRST_N << 16), MC1); in snd_aw2_saa7146_setup()
119 WRITEREG((EAP << 16) | EAP, MC1); in snd_aw2_saa7146_setup()
122 WRITEREG((EI2C << 16) | EI2C, MC1); in snd_aw2_saa7146_setup()
279 WRITEREG((TR_E_A2_OUT << 16) | TR_E_A2_OUT, MC1); in snd_aw2_saa7146_pcm_trigger_start_playback()
286 WRITEREG((TR_E_A1_OUT << 16) | TR_E_A1_OUT, MC1); in snd_aw2_saa7146_pcm_trigger_start_playback()
304 WRITEREG((TR_E_A2_OUT << 16), MC1); in snd_aw2_saa7146_pcm_trigger_stop_playback()
310 WRITEREG((TR_E_A1_OUT << 16), MC1); in snd_aw2_saa7146_pcm_trigger_stop_playback()
320 WRITEREG((TR_E_A1_IN << 16) | TR_E_A1_IN, MC1); in snd_aw2_saa7146_pcm_trigger_start_capture()
327 WRITEREG((TR_E_A1_IN << 16), MC1); in snd_aw2_saa7146_pcm_trigger_stop_capture()
H A Dsaa7146.h31 #define MC1 0xFC macro
95 /* MC1 */
/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-lxa-mc1.dts18 compatible = "lxa,stm32mp157c-mc1", "oct,stm32mp15xx-osd32", "st,stm32mp157";
43 label = "mc1:green:act";
54 label = "mc1:red:rgb";
61 label = "mc1:green:rgb";
68 label = "mc1:blue:rgb";
/linux/drivers/media/common/saa7146/
H A Dsaa7146_vbi.c77 WRITE_RPS1(CMD_WR_REG | (1 << 8) | (MC1/4)); in vbi_workaround()
103 saa7146_write(dev, MC1, (MASK_13 | MASK_29)); in vbi_workaround()
116 saa7146_write(dev, MC1, MASK_20); in vbi_workaround()
124 saa7146_write(dev, MC1, MASK_29); in vbi_workaround()
181 WRITE_RPS1(CMD_WR_REG_MASK | (MC1/4)); in saa7146_set_vbi_capture()
202 saa7146_write(dev, MC1, (MASK_13 | MASK_29)); in saa7146_set_vbi_capture()
317 saa7146_write(dev, MC1, MASK_29); in vbi_stop()
323 saa7146_write(dev, MC1, MASK_20); in vbi_stop()
H A Dsaa7146_hlp.c655 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
660 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
665 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
683 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
688 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
693 WRITE_RPS0(CMD_WR_REG_MASK | (MC1/4)); in program_capture_engine()
718 saa7146_write(dev, MC1, MASK_21); in saa7146_disable_clipping()
770 saa7146_write(dev, MC1, (MASK_12 | MASK_28)); in saa7146_set_capture()
H A Dsaa7146_core.c380 saa7146_write(dev, MC1, MASK_31); in saa7146_init_one()
387 saa7146_write(dev, MC1, 0x30ff0000); in saa7146_init_one()
504 saa7146_write(dev, MC1, 0x00ff0000); in saa7146_remove_one()
H A Dsaa7146_video.c241 saa7146_write(dev, MC1, MASK_28); in video_end()
247 saa7146_write(dev, MC1, dmas); in video_end()
H A Dsaa7146_i2c.c406 saa7146_write(dev, MC1, (MASK_08 | MASK_24)); in saa7146_i2c_adapter_prepare()
/linux/Documentation/driver-api/
H A Dedac.rst236 mc1 |
237 mc2 |- GPU card[0] => node 0(mc1), node 1(mc2)
256 ├── mc 1 # GPU node 0 == mc1, Each MC node has 4 UMCs/CSROWs
/linux/drivers/scsi/csiostor/
H A Dcsio_hw_t5.c336 * csio_t5_dfs_create_ext_mem - setup debugfs for MC0 or MC1 to read the values
340 * MC0 & MC1.
355 csio_add_debugfs_mem(hw, "mc1", MEM_MC1, in csio_t5_dfs_create_ext_mem()
/linux/arch/x86/events/intel/
H A Duncore_snbep.c1996 { /* MC1 Channel 0 */
2000 { /* MC1 Channel 1 */
2004 { /* MC1 Channel 3 */
2008 { /* MC1 Channel 4 */
2428 * 0x7841 MC0 UClk, MC1 UClk
2430 * MC1 DClk CH 0, MC1 DClk CH 1, MC1 DClk CH 2
2444 { /* MC1 UClk */
2460 { /* MC1 DClk CH 0 */
2464 { /* MC1 DClk CH 1 */
2468 { /* MC1 DClk CH 2 */
[all …]
/linux/drivers/media/pci/ttpci/
H A Dbudget-core.c52 saa7146_write(budget->dev, MC1, MASK_20); // DMA3 off in stop_ts_capture()
66 saa7146_write(dev, MC1, MASK_20); // DMA3 off in start_ts_capture()
143 saa7146_write(dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ in start_ts_capture()
H A Dbudget-av.c338 saa7146_write(saa, MC1, MASK_27 | MASK_11); in ciintf_init()
365 saa7146_write(saa, MC1, MASK_27); in ciintf_init()
382 saa7146_write(saa, MC1, MASK_27); in ciintf_deinit()
/linux/sound/soc/codecs/
H A Dmc13783.c460 SND_SOC_DAPM_SUPPLY("MC1 Bias", MC13783_AUDIO_TX, 0, 0, NULL, 0),
591 SOC_SINGLE("MC1 Capture Bias Switch", MC13783_AUDIO_TX, 0, 1, 0),
/linux/drivers/pinctrl/nomadik/
H A Dpinctrl-nomadik-db8500.c476 /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
878 DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
947 FUNCTION(mc1),
/linux/drivers/comedi/drivers/
H A Ds626.h177 /* Master Control Register 1 (MC1) constants. */
180 * Shut down all MC1-controlled
/linux/drivers/media/pci/saa7146/
H A Dhexium_gemini.c260 saa7146_write(dev, MC1, (MASK_08 | MASK_24 | MASK_10 | MASK_26)); in hexium_attach()
H A Dhexium_orion.c217 saa7146_write(dev, MC1, (MASK_08 | MASK_24 | MASK_10 | MASK_26)); in hexium_probe()
/linux/include/media/drv-intf/
H A Dsaa7146.h372 #define MC1 0xFC /* Main control register 1 */ macro
/linux/drivers/gpu/drm/etnaviv/
H A Detnaviv_gpu.c898 * On MC1.0 cores the linear window offset is ignored by the TS engine, in etnaviv_gpu_init()
915 "Need to move linear window on MC1.0, disabling TS\n"); in etnaviv_gpu_init()
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcudbg_lib.c407 /* In T6, there's no MC1. So, HMA shares MC1 in cudbg_get_entity_length()
1157 /* Some T5 cards have both MC0 and MC1. */ in cudbg_meminfo_get_mem_index()
/linux/drivers/gpu/drm/imagination/
H A Dpvr_drv.c47 * * BXS-4-64 MC1 (found in Texas Instruments J721S2/AM68)
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Duncore-cache.json1682 "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1",
1685 "EventName": "UNC_CHA_READ_NO_CREDITS.MC1",
1688 "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Counts the number of times when there are no credits available for sending reads from the CHA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's AD Ingress queue. : Filter for memory controller 1 only.",
7195 "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1",
7198 "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1",
7201 "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Counts the number of times when there are no credits available for sending WRITEs from the CHA into the iMC. In order to send WRITEs into the memory controller, the HA must first acquire a credit for the iMC's BL Ingress queue. : Filter for memory controller 1 only.",
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A Duncore-cache.json1682 "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1",
1685 "EventName": "UNC_CHA_READ_NO_CREDITS.MC1",
1688 "PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Counts the number of times when there are no credits available for sending reads from the CHA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's AD Ingress queue. : Filter for memory controller 1 only.",
7427 "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1",
7430 "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1",
7433 "PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Counts the number of times when there are no credits available for sending WRITEs from the CHA into the iMC. In order to send WRITEs into the memory controller, the HA must first acquire a credit for the iMC's BL Ingress queue. : Filter for memory controller 1 only.",
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Duncore-cache.json2508 "BriefDescription": "CHA iMC CHNx READ Credits Empty : MC1",
2511 "EventName": "UNC_CHA_READ_NO_CREDITS.MC1",
2514 …"PublicDescription": "CHA iMC CHNx READ Credits Empty : MC1 : Counts the number of times when ther…
8341 "BriefDescription": "CHA iMC CHNx WRITE Credits Empty : MC1",
8344 "EventName": "UNC_CHA_WRITE_NO_CREDITS.MC1",
8347 …"PublicDescription": "CHA iMC CHNx WRITE Credits Empty : MC1 : Counts the number of times when the…

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