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Searched full:lane1 (Results 1 – 22 of 22) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Danalogix,anx7625.yaml72 analogix,lane1-swing:
77 an array of swing register setting for DP tx lane1 PHY.
78 DP TX lane1 swing register setting same with lane0
150 analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-rockchip-usbdp.yaml60 3>;", assuming DP lane0 on Type-C phy lane2, DP lane1 on Type-C phy
62 <0, 1, 2, 3>;", assuming DP lane0 on Type-C phy lane0, DP lane1 on Type-C
63 phy lane1, DP lane2 on Type-C phy lane2, DP lane3 on Type-C phy lane3. If
H A Dairoha,en7581-pcie-phy.yaml23 - description: PCIE lane1 base address
25 - description: PCIE lane1 detection time base address
H A Dti,phy-am654-serdes.txt17 1 - PCIe0 Lane1
18 2 - ICSS2 SGMII Lane1
H A Dqcom,msm8996-qmp-pcie-phy.yaml88 - lane1
H A Dfsl,imx8qm-hsio.yaml55 | | Lane0| Lane1| Lane2|
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dmediatek-pcie-gen3.yaml86 enum: [ phy, mac, phy-lane0, phy-lane1, phy-lane2 ]
245 - const: phy-lane1
H A Dpci-armada8k.txt25 Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8186-corsola-steelix.dtsi64 analogix,lane1-swing = /bits/ 8 <0x70 0x30>;
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-friendlyelec-cm3588-nas.dts379 /* 2. M.2 socket, CON14: pcie30phy port0 lane1, @fe170000 */
391 /* 4. M.2 socket, CON16: pcie30phy port1 lane1, @fe180000 */
H A Drk3568.dtsi104 /* bifurcation; lane1 when using 1+1 */
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-8040-mcbin.dtsi188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
H A Darmada-8040-puzzle-m801.dts521 phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_serdes_25g_regs.h263 /* Lane1 reset signal active low */
H A Dal_hal_pcie_axi_reg.h264 uint32_t lane1; member
274 uint32_t lane1; member
H A Dal_hal_pcie.c1022 pcie_port->regs->axi.status.lane[1] = &regs->axi.status.lane1; in al_pcie_port_handle_init()
1089 pcie_port->regs->axi.status.lane[1] = &regs->axi.status.lane1; in al_pcie_port_handle_init()
1170 pcie_port->regs->axi.status.lane[1] = &regs->axi.status.lane1; in al_pcie_port_handle_init()
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996.dtsi723 reset-names = "lane1";
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp3097 unsigned Lane1 = Ins1.getConstantOperandVal(2); in tryInsertVectorElt() local
3099 if (Lane2 % 2 != 0 || Lane1 != Lane2 + 1) in tryInsertVectorElt()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp11848 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); in EmitAArch64BuiltinExpr()
11860 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); in EmitAArch64BuiltinExpr()
11872 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); in EmitAArch64BuiltinExpr()
/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h3405 …ta returned by the EVENT_COUNTER_DATA_REG register. - 0x0: Lane0 - 0x1: Lane1 - 0x2: Lane2 - .…
3612 … (0xf<<24) // Latest Transmitter Preset Requested from Upstream Component on Lane1
3614 … (0x7<<28) // Latest Receiver Preset Requested from Upstream Component on Lane1
3801 … during LTSSM Detect state and uses this value instead. - 0: Lane0 - 1: Lane1 - 2: Lane2 - .. …
3825 …or Silicon Debug Status Register of Layer1-PerLane. - 0x0: Lane0 - 0x1: Lane1 - 0x2: Lane2 - .…
3935 …OL[2/3] and SD_EQ_STATUS[1/2/3] viewport registers. - 0x0: Lane0 - 0x1: Lane1 - 0x2: Lane2 - .…
4142 …ring LTSSM detect state and uses this value instead. 0x0 = Lane0. 0x1 = Lane1. 0x2 = Lane2. 0…
4186 …for silicon debug status register of Layer1-PerLane. 0x0 = Lane0. 0x1 = Lane1. 0x2 = Lane2. 0…
4298 …ROL[2/3] and SD_EQ_STATUS[1/2/3] viewport registers. 0x0 = Lane0. 0x1 = Lane1. 0x2 = Lane2. _ …
28624 …SR_5_X401_L1_MASTER_CDN_O_K2_E5 (0x1<<1) // Lane1 master reset
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t5.c42602 { "Lane1", 1, 1 },
46674 { "Lane1", 1, 1 },
50746 { "Lane1", 1, 1 },
54818 { "Lane1", 1, 1 },
/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h32264 * bit1 = lane1 ..bit31 = lane31
32270 * bit1 = lane1 ..bit31 = lane31