Home
last modified time | relevance | path

Searched full:llcc (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml4 $id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
23 - qcom,ipq5424-llcc
24 - qcom,qcs615-llcc
25 - qcom,qcs8300-llcc
26 - qcom,qdu1000-llcc
27 - qcom,sa8775p-llcc
28 - qcom,sar1130p-llcc
29 - qcom,sar2130p-llcc
30 - qcom,sc7180-llcc
[all …]
/linux/include/linux/soc/qcom/
H A Dllcc-qcom.h81 * @slice_id: llcc slice id
82 * @slice_size: Size allocated for the llcc slice
90 * struct llcc_edac_reg_data - llcc edac registers data for each error type
108 /* LLCC TRP registers */
118 /* LLCC Common registers */
123 /* LLCC DRP registers */
136 * struct llcc_drv_data - Data associated with the llcc driver
137 * @regmaps: regmaps associated with the llcc device
138 * @bcast_regmap: regmap associated with llcc broadcast OR offset
139 * @bcast_and_regmap: regmap associated with llcc broadcast AND offset
[all …]
/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,msm8998-bwmon.yaml20 (DDR) - called LLCC BWMON.
37 - qcom,sm6350-llcc-bwmon
46 - qcom,qcs615-llcc-bwmon
47 - qcom,qcs8300-llcc-bwmon
48 - qcom,sa8775p-llcc-bwmon
49 - qcom,sc7180-llcc-bwmon
50 - qcom,sc8280xp-llcc-bwmon
52 - qcom,sm8250-llcc-bwmon
53 - qcom,sm8550-llcc-bwmon
54 - qcom,sm8650-llcc-bwmon
[all …]
/linux/drivers/edac/
H A Dqcom_edac.c12 #include <linux/soc/qcom/llcc-qcom.h>
265 "LLCC Data RAM correctable Error"); in dump_syn_reg()
269 "LLCC Data RAM uncorrectable Error"); in dump_syn_reg()
273 "LLCC Tag RAM correctable Error"); in dump_syn_reg()
277 "LLCC Tag RAM uncorrectable Error"); in dump_syn_reg()
352 edev_ctl = edac_device_alloc_ctl_info(0, "qcom-llcc", 1, "bank", in qcom_llcc_edac_probe()
362 edev_ctl->ctl_name = "llcc"; in qcom_llcc_edac_probe()
365 /* Check if LLCC driver has passed ECC IRQ */ in qcom_llcc_edac_probe()
H A DKconfig511 As of now, it supports error reporting for Last Level Cache Controller (LLCC)
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm850-samsung-w737.dts394 &llcc {
H A Dqdu1000.dtsi1601 compatible = "qcom,qdu1000-llcc";
/linux/drivers/net/ethernet/sun/
H A Dcassini.h2200 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP, \
2298 { "LLCc?",0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S3_CLNP,
2378 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP,
2434 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP,