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/linux/Documentation/devicetree/bindings/regulator/
H A Drohm,bd71815-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
33 regulator-name:
37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
40 Properties for single LDO/BUCK regulator.
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H A Dnxp,pca9450-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pca9450-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robin Gong <yibin.gong@nxp.com>
18 https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf
21 https://www.nxp.com/docs/en/data-sheet/PF9453_SDS.pdf
31 - nxp,pca9450a
32 - nxp,pca9450b
33 - nxp,pca9450c
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn-tqma8mqnl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
9 model = "TQ-Systems i.MX8MN TQMa8MxNL";
10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MXNL_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
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H A Dimx8mm-tqma8mqml.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML";
11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
19 /* e-MMC IO, needed for HS modes */
20 reg_vcc1v8: regulator-vcc1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "TQMA8MXML_VCC1V8";
23 regulator-min-microvolt = <1800000>;
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/linux/drivers/regulator/
H A Dpf9453-regulator.c1 // SPDX-License-Identifier: GPL-2.0
216 .max_register = PF9453_MAX_REG - 1,
253 int ret = -EINVAL; in pf9453_pmic_write()
257 /* If not updating entire register, perform a read-mod-write */ in pf9453_pmic_write()
263 ret = regmap_read(pf9453->regmap, reg, &rxBuf); in pf9453_pmic_write()
265 dev_err(pf9453->dev, "Read reg=%0x error!\n", reg); in pf9453_pmic_write()
273 ret = regmap_raw_write(pf9453->regmap, PF9453_REG_LOCK, &key, 1U); in pf9453_pmic_write()
275 dev_err(pf9453->dev, "Write reg=%0x error!\n", reg); in pf9453_pmic_write()
279 ret = regmap_raw_write(pf9453->regmap, reg, &data, 1U); in pf9453_pmic_write()
281 dev_err(pf9453->dev, "Write reg=%0x error!\n", reg); in pf9453_pmic_write()
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