| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | intel,ce4100-lapic.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml# 7 title: Intel Local Advanced Programmable Interrupt Controller (LAPIC) 15 architecture design, with a local component (LAPIC) integrated 17 (lapic) receives interrupts from the processor's interrupt pins, 22 Many of the Intel's generic devices like hpet, ioapic, lapic have 32 const: intel,ce4100-lapic 47 Virtual Wire Mode - use lapic as virtual wire interrupt delivery mode. 66 compatible = "intel,ce4100-lapic";
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| H A D | intel,ce4100-ioapic.yaml | 15 architecture design, with a local component (LAPIC) integrated 17 (lapic) receives interrupts from the processor's interrupt pins, 22 Many of the Intel's generic devices like hpet, ioapic, lapic have
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| /linux/Documentation/arch/x86/x86_64/ |
| H A D | cpu-hotplug-spec.rst | 12 In ACPI each CPU needs an LAPIC object in the MADT table (5.2.11.5 in the 13 ACPI 3.0 specification). ACPI already has the concept of disabled LAPIC 14 objects by setting the Enabled bit in the LAPIC object to zero. 18 it should have its LAPIC Enabled bit set to 0. Linux will use the number
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| /linux/tools/testing/selftests/kvm/x86/ |
| H A D | xapic_state_test.c | 200 struct kvm_lapic_state lapic = {}; in test_x2apic_id() local 213 *(u32 *)(lapic.regs + APIC_ID) = i << 24; in test_x2apic_id() 214 *(u32 *)(lapic.regs + APIC_SPIV) = APIC_SPIV_APIC_ENABLED; in test_x2apic_id() 215 vcpu_ioctl(vcpu, KVM_SET_LAPIC, &lapic); in test_x2apic_id() 217 vcpu_ioctl(vcpu, KVM_GET_LAPIC, &lapic); in test_x2apic_id() 218 TEST_ASSERT(*((u32 *)&lapic.regs[APIC_ID]) == vcpu->id << 24, in test_x2apic_id()
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| H A D | svm_int_ctl_test.c | 35 /* This code raises interrupt INTR_IRQ_NUMBER in the L1's LAPIC, in l2_guest_code()
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| H A D | xapic_ipi_test.c | 69 * arch/x86/kvm/lapic.c). If test is failing, check that values match
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| /linux/arch/x86/platform/ce4100/ |
| H A D | falconfalls.dts | 22 lapic = <&lapic0>; 45 compatible = "intel,ce4100-lapic";
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| /linux/arch/x86/kernel/ |
| H A D | mpparse.c | 157 if (!mpc->lapic) { in smp_check_mpc() 170 pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic); in smp_check_mpc() 201 /* Initialize the lapic mapping */ in smp_read_mpc() 203 register_lapic_address(mpc->lapic); in smp_read_mpc()
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| H A D | irqinit.c | 63 * and then got re-enabled by "lapic", it hangs at boot time without this. in init_ISA_irqs()
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| /linux/arch/x86/platform/intel-mid/ |
| H A D | intel-mid.c | 53 /* Lapic only, no apbt */ in intel_mid_time_init()
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| /linux/arch/x86/mm/ |
| H A D | srat.c | 64 /* Callback for Proximity Domain -> LAPIC mapping */
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| /linux/arch/x86/include/asm/ |
| H A D | mpspec_def.h | 47 unsigned int lapic; /* APIC address */ member
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| /linux/drivers/platform/x86/amd/pmc/ |
| H A D | pmc.c | 55 {"LAPIC", BIT(18)}, 72 {"LAPIC", BIT(13)}, 98 {"LAPIC", BIT(11)},
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| /linux/arch/x86/kvm/vmx/ |
| H A D | posted_intr.c | 10 #include "lapic.h"
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| H A D | vmx.c | 63 #include "lapic.h"
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| /linux/arch/loongarch/kernel/ |
| H A D | acpi.c | 413 pr_info(PREFIX "Unable to map lapic to logical cpu number\n"); in acpi_map_cpu()
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| /linux/drivers/acpi/ |
| H A D | tables.c | 58 pr_debug("LAPIC (acpi_id[0x%02x] lapic_id[0x%02x] %s)\n", in acpi_table_print_madt_entry()
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| H A D | processor_idle.c | 145 * Check, if one of the previous states already marked the lapic in lapic_timer_check_state()
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| /linux/drivers/thermal/intel/ |
| H A D | therm_throt.c | 1040 /* We'll mask the thermal vector in the lapic till we're ready: */ in intel_init_thermal()
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| /linux/kernel/time/ |
| H A D | tick-broadcast.c | 382 * misfeature only on x86 (lapic) in tick_do_broadcast()
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| /linux/arch/x86/events/amd/ |
| H A D | core.c | 864 * doesn't arrive at the LAPIC in time to become a pending NMI, then the kernel
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| /linux/Documentation/admin-guide/ |
| H A D | kernel-parameters.txt | 3435 lapic [X86-32,APIC,EARLY] Enable the local APIC even if BIOS 3438 lapic= [X86,APIC] Do not use TSC deadline 3439 value for LAPIC timer one-shot implementation. Default 3440 back to the programmable timer unit in the LAPIC.
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