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/linux/drivers/ras/amd/atl/
H A Dreg_fields.h216 * Hash Interleave Controls
299 * Interleave Address Select
311 * D18F7xE0C [DRAM Address Interleave]
314 * D18F7x20C [DRAM Address Interleave]
322 * Interleave Number of Channels
334 * D18F7xE0C [DRAM Address Interleave]
337 * D18F7x20C [DRAM Address Interleave]
347 * Interleave Number of Dies
361 * D18F7xE0C [DRAM Address Interleave]
364 * D18F7x20C [DRAM Address Interleave]
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H A Dinternal.h108 * interleave modes with a number of channels divisible by 3 or the
109 * value will be 5 for interleave modes with a number of channels
110 * divisible by 5. Power-of-two interleave modes are handled
118 * address. The other bits depend on the interleave bit position which
119 * will be bit 10 for 1K interleave stripe cases and bit 11 for 2K
120 * interleave stripe cases.
220 /* Position of the 'interleave bit'. */
361 atl_debug(ctx, "Unrecognized interleave mode: %u", ctx->map.intlv_mode); in atl_debug_on_bad_intlv_mode()
H A Ddenormalize.c38 * # of interleave bits (n): 3
39 * starting interleave bit (p): 8
58 * # of interleave bits (n): 3
59 * starting interleave bit (p): 8
66 * r = n - 1; remaining interleave bits
72 /* Make a single space at the interleave bit. */ in make_space_for_coh_st_id_split_2_1()
75 /* Done if there's only a single interleave bit. */ in make_space_for_coh_st_id_split_2_1()
79 /* Make spaces for the remaining interleave bits starting at bit 12. */ in make_space_for_coh_st_id_split_2_1()
100 pr_debug("Invalid interleave bit: %u", ctx->map.intlv_bit_pos); in make_space_for_coh_st_id_mi300()
119 * to make a gap where the interleave bits will be inserted.
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/linux/Documentation/devicetree/bindings/sound/
H A Dmax98373.txt15 interleave slot.
24 - maxim,interleave-mode : For cases where a single combined channel
29 Boolean, define to enable the interleave mode, Default : false
39 maxim,interleave-mode;
H A Dmaxim,max98925.yaml35 will be used as interleave slot.
45 maxim,interleave-mode:
50 Interleave mode provides a means to output VMON and IMON data from two
H A Dadi,max98388.yaml45 adi,interleave-mode:
76 adi,interleave-mode;
/linux/Documentation/driver-api/cxl/
H A Dmemory-devices.rst28 Platform firmware enumerates a menu of interleave options at the "CXL root port"
32 at which the interleave can be split. For example platform firmware may say at a
34 interleave cycles across multiple Root Ports. An intervening Switch between a
35 port and an endpoint may interleave cycles across multiple Downstream Switch
251 participate". A given expander can participate in multiple CXL.mem interleave
253 example mem3 can participate in one or more of a PMEM interleave that spans to
254 Host Bridges, a PMEM interleave that targets a single Host Bridge, a Volatile
255 memory interleave that spans 2 Host Bridges, and a Volatile memory interleave
/linux/Documentation/admin-guide/mm/
H A Dnuma_memory_policy.rst39 up, the system default policy will be set to interleave
227 Interleave mode indexes the set of nodes specified by the
236 For allocation of page cache pages, Interleave mode indexes
258 Weighted interleave allocates pages on nodes according to a
271 Many), preferred node (Preferred) or nodemask (Bind, Interleave) is
281 mems 1-3 that sets an Interleave policy over the same set. If
282 the cpuset's mems change to 3-5, the Interleave will now occur
284 3 is allowed from the user's nodemask, the "interleave" only
302 nodes, the node (Preferred) or nodemask (Bind, Interleave) is
313 Bind or Interleave case, the third and fifth) nodes in the set of
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/linux/Documentation/devicetree/bindings/net/
H A Dlantiq,pef2256.yaml89 bit/s, the data (all 32 8-bit) present in the frame are interleave with
91 correct alignment of the interleave mechanism.
93 lantiq,channel-phase = 2, the interleave schema with unused time-slots
98 interleave schema is
102 lantiq,channel-phase = 1, the interleave schema is
/linux/drivers/media/dvb-frontends/
H A Dlgs8gxx_priv.h35 #define TIM_MASK 0x20 /* Time Interleave Length Mask */
36 #define TIM_LONG 0x20 /* Time Interleave Length = 720 */
37 #define TIM_MIDDLE 0x00 /* Time Interleave Length = 240 */
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-cxl278 configured interleave order of the decoder's dport instances.
378 decoder's position in the interleave is determined by the
380 decoders their interleave is specified by platform firmware and
391 to the next target in the interleave at address N +
403 (interleave-set) within the decode range bounded by root decoder
453 interleave set will claim. The possible interleave granularity
478 interleave configuration parameters. Once set it cannot be
515 interleave and N is the 'interleave_ways' setting for the
518 position relative to the root decoder interleave. EBUSY is
520 if the region is not in a state to accept interleave
H A Dsysfs-kernel-mm-mempolicy-weighted-interleave4 Description: Configuration Interface for the Weighted Interleave policy
11 The interleave weight for a memory node (N). These weights are
/linux/drivers/mtd/chips/
H A Dcfi_util.c43 unsigned interleave = cfi_interleave(cfi); in cfi_build_cmd_addr() local
47 addr = (cmd_ofs * type) * interleave; in cfi_build_cmd_addr()
54 if (((type * interleave) > bankwidth) && ((cmd_ofs & 0xff) == 0xaa)) in cfi_build_cmd_addr()
55 addr |= (type >> 1)*interleave; in cfi_build_cmd_addr()
62 * Transforms the CFI command for the given geometry (bus width & interleave).
222 int osf = cfi->interleave * cfi->device_type; /* scale factor */ in cfi_qry_present()
302 int ofs_factor = cfi->interleave * cfi->device_type; in cfi_read_pri()
H A DKconfig128 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
135 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
142 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
149 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
/linux/sound/pci/echoaudio/
H A Dechoaudio_dsp.c788 /* Look for super-interleave (no big-endian and 8 bits) */ in set_audio_format()
789 if (format->interleave > 2) { in set_audio_format()
801 dsp_format |= format->interleave; in set_audio_format()
804 switch (format->interleave) { in set_audio_format()
814 } else if (format->interleave == 1 && in set_audio_format()
822 if (format->interleave == 2) in set_audio_format()
829 if (format->interleave == 2) in set_audio_format()
835 if (format->interleave == 2) in set_audio_format()
841 if (format->interleave == 2) in set_audio_format()
857 first channel must be set, regardless its interleave.
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H A Dechoaudio_dsp.h435 * Super-interleave is defined as interleaving by 4 or more. Darla20 and Gina20
436 * do not support super interleave.
439 * interleave. The interleave factor must be even. 16 - way interleave is the
440 * current maximum, so you can interleave by 4, 6, 8, 10, 12, 14, and 16.
443 * the interleave factor. So, 32 bit interleave by 6 is 0x86 and
444 * 16 bit interleave by 16 is (0x40 | 0x10) = 0x50.
/linux/drivers/nvdimm/
H A Dlabel.h74 * @nlabel: 1 per interleave-way in the region
80 * @ig: interleave granularity (1 << @ig) * 256 bytes
108 * @isetcookie: interleave set cookie
155 * @region_uuid: host interleave set identifier
/linux/tools/testing/selftests/bpf/benchs/
H A Dbench_local_storage.c187 skel->rodata->interleave = 0; in hashmap_setup()
202 skel->rodata->interleave = 0; in local_storage_cache_get_setup()
217 skel->rodata->interleave = 1; in local_storage_cache_get_interleaved_setup()
246 * cache interleaved get: like "sequential get", but interleave 4 calls to the
/linux/tools/perf/scripts/python/
H A Dintel-pt-events.py80 ap.add_argument("--interleave", type=int, nargs='?', const=4, default=0)
105 if glb_args.interleave:
127 # Output at most glb_args.interleave output strings per cpu
130 countdown = glb_args.interleave
436 if glb_args.interleave:
446 if glb_args.interleave:
467 if glb_args.interleave:
/linux/include/linux/mtd/
H A Dcfi.h28 # define cfi_interleave(cfi) ((cfi)->interleave)
40 # define cfi_interleave(cfi) ((cfi)->interleave)
52 # define cfi_interleave(cfi) ((cfi)->interleave)
276 int interleave; member
/linux/tools/testing/selftests/bpf/progs/
H A Dlocal_storage_bench.c43 const volatile unsigned int interleave; variable
85 if (interleave && map_idx % 3 == 0) in loop()
/linux/arch/sparc/kernel/
H A Dchmc.c84 int interleave; member
651 bp->interleave = 1; in chmc_interpret_one_decode_reg()
655 bp->interleave = 2; in chmc_interpret_one_decode_reg()
659 bp->interleave = 4; in chmc_interpret_one_decode_reg()
663 bp->interleave = 8; in chmc_interpret_one_decode_reg()
667 bp->interleave = 16; in chmc_interpret_one_decode_reg()
676 bp->size /= bp->interleave; in chmc_interpret_one_decode_reg()
/linux/drivers/scsi/esas2r/
H A Desas2r_targdb.c145 if (dc->interleave == 0 in esas2r_targ_db_add_raid()
157 t->inter_byte = dc->interleave; in esas2r_targ_db_add_raid()
158 t->inter_block = dc->interleave / dc->block_size; in esas2r_targ_db_add_raid()
/linux/drivers/cxl/core/
H A Dregion.c28 * 1. Interleave granularity
29 * 2. Interleave size
488 * Even for x3, x6, and x12 interleaves the region interleave must be a in interleave_ways_store()
489 * power of 2 multiple of the host bridge interleave. in interleave_ways_store()
493 dev_dbg(&cxlr->dev, "invalid interleave: %d\n", val); in interleave_ways_store()
557 * interleave result in needing multiple endpoints to support a single in interleave_granularity_store()
558 * slot in the interleave (possible to support in the future). Regions in interleave_granularity_store()
559 * with a granularity greater than the root interleave result in invalid in interleave_granularity_store()
1035 * @pos: interleave position of @cxled in @cxlr
1259 * interleave bits are none. in check_interleave_cap()
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/linux/Documentation/translations/zh_CN/filesystems/
H A Dtmpfs.rst80 mpol=interleave 倾向于依次从每个节点分配
81 mpol=interleave:NodeList 依次从每个节点分配

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