Searched full:irs (Results 1 – 9 of 9) sorted by relevance
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,gic-v5.yaml | 21 - one or more IRS (Interrupt Routing Service) 78 "^irs@[0-9a-f]+$": 81 GICv5 has one or more Interrupt Routing Services (IRS) that are 88 const: arm,gic-v5-irs 93 - description: IRS config frames 94 - description: IRS setlpi frames 117 Present if the GIC IRS permits programming shareability and 123 CPUs managed by the IRS. 137 ITS is connected to an IRS. 236 irs@2f1a0000 { [all …]
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| /linux/drivers/irqchip/ |
| H A D | irq-gic-v5-irs.c | 6 #define pr_fmt(fmt) "GICv5 IRS: " fmt 240 * Make sure we invalidate the cache line pulled before the IRS in gicv5_irs_iste_alloc() 521 pr_err("No IRS associated with CPU %u\n", cpuid); in gicv5_irs_register_cpu() 558 * A non-coherent IRS implies that some cache levels cannot be in gicv5_irs_init_bases() 602 * record IRS<->CPU topology information. in gicv5_irs_of_init_affinity() 640 pr_warn("CPU %d iaffid 0x%x exceeds IRS iaffid bits\n", in gicv5_irs_of_init_affinity() 648 /* We also know that the CPU is connected to this IRS */ in gicv5_irs_of_init_affinity() 703 pr_err("%pOF: unable to map GICv5 IRS registers\n", node); in gicv5_irs_init() 741 * Do the global setting only on the first IRS. in gicv5_irs_init() 818 if (!of_device_is_compatible(np, "arm,gic-v5-irs")) in gicv5_irs_of_probe() [all …]
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| /linux/drivers/iio/proximity/ |
| H A D | Kconfig | 59 tristate "Murata IRS-D200 PIR sensor" 65 Say Y here to build a driver for the Murata IRS-D200 PIR sensor.
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| /linux/Documentation/devicetree/bindings/iio/proximity/ |
| H A D | murata,irsd200.yaml | 7 title: Murata IRS-D200 PIR sensor
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| /linux/drivers/media/pci/ddbridge/ |
| H A D | ddbridge-i2c.c | 46 dev_err(dev->dev, "DDBridge IRS %08x\n", istat); in ddb_i2c_cmd() 52 dev_err(dev->dev, "DDBridge link %u IRS %08x\n", in ddb_i2c_cmd()
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| /linux/arch/s390/kernel/ |
| H A D | ebcdic.c | 29 /* ->IGS ->IRS ->IUS */ 101 /* 0x18 CAN EM -UBS -CU1 -IFS -IGS -IRS -ITB 178 /* ->IGS ->IRS ->IUS */ 250 /* 0x18 CAN EM -UBS -CU1 -IFS -IGS -IRS -ITB
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| /linux/include/linux/irqchip/ |
| H A D | arm-gic-v5.h | 44 * IRS registers and tables structures
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| /linux/drivers/infiniband/hw/cxgb4/ |
| H A D | t4fw_ri_api.h | 779 __be32 irs; member
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| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_main.c | 9240 * 1. Sync IRS for default SB in bnx2x_func_wait_started()
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