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/freebsd/sys/contrib/device-tree/Bindings/arm/omap/
H A Dcrossbar.txt13 - ti,max-irqs: Total number of irqs available at the parent interrupt controller.
17 - ti,irqs-reserved: List of the reserved irq lines that are not muxed using
23 - ti,irqs-skip: This is similar to "ti,irqs-reserved", but these are for
24 SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
25 crossbar. These irqs have a crossbar register, but still cannot be used.
27 - ti,irqs-safe-map: integer which maps to a safe configuration to use
34 ti,max-irqs = <160>;
37 ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
38 ti,irqs-skip = <10 133 139 140>;
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Datmel,aic.yaml49 atmel,external-irqs:
51 description: u32 array of external irqs.
62 atmel,external-irqs:
67 atmel,external-irqs:
76 - atmel,external-irqs
87 atmel,external-irqs = <31>;
H A Dst,sti-irq-syscfg.txt1 STMicroelectronics STi System Configuration Controlled IRQs
5 and PL310 L2 Cache IRQs are controlled using System Configuration registers.
11 - st,irq-device : Array of IRQs to enable - should be 2 in length
15 - st,invert-ext : External IRQs can be inverted at will. This property inverts
16 these IRQs using bitwise logic. A number of defines have been
H A Dmrvl,intc.yaml22 - mrvl,intc-nr-irqs
86 mrvl,intc-nr-irqs:
111 mrvl,intc-nr-irqs = <64>;
121 mrvl,intc-nr-irqs = <2>;
H A Dfsl,irqsteer.yaml60 u32 value representing the output channel that all input IRQs should be
63 fsl,num-irqs:
78 - fsl,num-irqs
110 fsl,num-irqs = <64>;
H A Dmstar,mst-intc.yaml33 mstar,irqs-map-range:
50 - mstar,irqs-map-range
62 mstar,irqs-map-range = <0 63>;
H A Dti,sci-intr.txt29 Driver should request the system controller to get the range of GIC IRQs
31 track of Host IRQs.
53 - ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs
55 corresponds to a range of host irqs.
H A Dbrcm,bcm6345-l1-intc.txt13 peripheral IRQs to be routed to any CPU
22 2-4 status words to determine which IRQs are pending
28 the number of supported IRQs is inferred from the size argument
H A Dbrcm,bcm7038-l1-intc.txt14 peripheral IRQs to be routed to any CPU
21 2-5 status words to determine which IRQs are pending
27 the number of supported IRQs is inferred from the size argument
H A Dmrvl,intc.txt22 - mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
33 mrvl,intc-nr-irqs = <64>;
43 mrvl,intc-nr-irqs = <2>;
/freebsd/sys/i386/pci/
H A Dpci_pir.c81 static void pci_print_irqmask(u_int16_t irqs);
110 /* IRQs 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, 15 */
116 "Mask of allowed irqs to try to route when it has no good clue about\n"
117 "which irqs it should use.");
236 if (intpin->irqs != pci_link->pl_irqmask) { in pci_pir_create_links()
243 pci_link->pl_irqmask &= intpin->irqs; in pci_pir_create_links()
248 pci_link->pl_irqmask = intpin->irqs; in pci_pir_create_links()
319 /* Don't trust any BIOS IRQs greater than 15. */ in pci_pir_initial_irqs()
347 * prefer the new IRQ instead. If both IRQs are valid, then just in pci_pir_initial_irqs()
410 * allow invalid IRQs to be specified but warn about them. An IRQ in pci_pir_parse()
[all …]
/freebsd/tools/tools/pirtool/
H A Dpirtool.c56 void pci_print_irqmask(uint16_t irqs);
58 uint16_t irqs);
182 pci_print_irqmask(uint16_t irqs) in pci_print_irqmask() argument
186 if (irqs == 0) { in pci_print_irqmask()
191 for (i = 0; i < 16; i++, irqs >>= 1) in pci_print_irqmask()
192 if (irqs & 1) { in pci_print_irqmask()
231 "0x%02x: PCI Exclusive IRQs: ", in dump_pir_table()
249 printf("Entry Location Bus Device Pin Link IRQs\n"); in dump_pir_table()
263 uint16_t irqs) in print_irq_line() argument
277 pci_print_irqmask(irqs); in print_irq_line()
/freebsd/sys/dev/acpica/
H A Dacpi_container.c42 int count, int maxcount, int *irqs);
44 int count, int *irqs);
113 int *irqs) in acpi_syscont_alloc_msi() argument
118 irqs)); in acpi_syscont_alloc_msi()
122 acpi_syscont_release_msi(device_t bus, device_t dev, int count, int *irqs) in acpi_syscont_release_msi() argument
126 return (PCIB_RELEASE_MSI(device_get_parent(parent), dev, count, irqs)); in acpi_syscont_release_msi()
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dmmp3.dtsi54 mrvl,intc-nr-irqs = <64>;
64 mrvl,intc-nr-irqs = <4>;
74 mrvl,intc-nr-irqs = <2>;
84 mrvl,intc-nr-irqs = <3>;
94 mrvl,intc-nr-irqs = <3>;
104 mrvl,intc-nr-irqs = <5>;
114 mrvl,intc-nr-irqs = <2>;
124 mrvl,intc-nr-irqs = <2>;
134 mrvl,intc-nr-irqs = <31>;
144 mrvl,intc-nr-irqs = <2>;
[all …]
H A Dmmp2.dtsi59 mrvl,intc-nr-irqs = <64>;
69 mrvl,intc-nr-irqs = <2>;
79 mrvl,intc-nr-irqs = <2>;
90 mrvl,intc-nr-irqs = <3>;
100 mrvl,intc-nr-irqs = <5>;
110 mrvl,intc-nr-irqs = <15>;
120 mrvl,intc-nr-irqs = <2>;
130 mrvl,intc-nr-irqs = <2>;
/freebsd/sys/arm/arm/
H A Dgeneric_timer.c107 struct arm_tmr_irq irqs[GT_IRQ_COUNT]; member
412 irq = &sc->irqs[sc->irq_count]; in arm_tmr_attach_irq()
523 bus_release_resource(dev, SYS_RES_IRQ, sc->irqs[i].rid, in arm_tmr_fdt_attach()
524 sc->irqs[i].res); in arm_tmr_fdt_attach()
607 sc->irqs[i].rid, sc->irqs[i].res); in arm_tmr_acpi_attach()
665 /* Confirm that non-optional irqs were allocated before coming in. */ in arm_tmr_attach()
676 if (sc->irqs[j].idx == irq_def->idx) in arm_tmr_attach()
733 /* Setup secure, non-secure and virtual IRQs handler */ in arm_tmr_attach()
735 /* Only enable IRQs on timers we expect to use */ in arm_tmr_attach()
736 if (sc->irqs[i].idx < first_timer || in arm_tmr_attach()
[all …]
/freebsd/sys/x86/include/
H A Dintr_machdep.h38 * controller or an MSI interrupt. The 16 ISA IRQs are assigned fixed
42 * the IRQs are not used, so the total number of IRQ values reserved
45 * The first 16 IRQs (0 - 15) are reserved for ISA IRQs. Interrupt
156 int msi_alloc(device_t dev, int count, int maxcount, int *irqs);
159 int msi_release(int *irqs, int count);
/freebsd/sys/x86/x86/
H A Dmsi.c161 "Number of IRQs reserved for MSI and MSI-X interrupts");
403 msi_alloc(device_t dev, int count, int maxcount, int *irqs) in msi_alloc() argument
426 /* Try to find 'count' free IRQs. */ in msi_alloc()
437 irqs[cnt] = i; in msi_alloc()
462 /* Ok, we now have the IRQs allocated. */ in msi_alloc()
467 vector = apic_alloc_vectors(cpu, irqs, count, maxcount); in msi_alloc()
482 apic_free_vector(cpu, vector + i, irqs[i]); in msi_alloc()
488 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]); in msi_alloc()
494 fsrc = (struct msi_intsrc *)intr_lookup_source(irqs[0]); in msi_alloc()
496 msi = (struct msi_intsrc *)intr_lookup_source(irqs[i]); in msi_alloc()
[all …]
/freebsd/sys/powerpc/powernv/
H A Dopal_dev.c143 pcell_t *irqs; in opaldev_probe() local
153 /* Manually add IRQs before attaching */ in opaldev_probe()
159 "opal-interrupts") / sizeof(*irqs); in opaldev_probe()
160 irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK); in opaldev_probe()
161 OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs, in opaldev_probe()
162 n_irqs * sizeof(*irqs)); in opaldev_probe()
165 ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1); in opaldev_probe()
166 free(irqs, M_DEVBUF); in opaldev_probe()
/freebsd/sys/x86/isa/
H A Delcr.c35 * IRQs 0 through 15. Thus, we check for the presence of an ELCR on
37 * sane. Note that the polarity of ISA and EISA IRQs are linked to the
38 * trigger mode. All edge triggered IRQs use active-hi polarity, and
60 * verifying that IRQs 0, 1, 2, and 13 are all edge triggered.
72 printf("ELCR Found. ISA IRQs programmed as:\n"); in elcr_probe()
/freebsd/sys/dev/pci/
H A Dpcib_if.m113 # Allocate 'count' MSI messages mapped onto 'count' IRQs. 'irq' points
124 int *irqs;
128 # Release 'count' MSI messages mapped onto 'count' IRQs stored in the
129 # array pointed to by 'irqs'.
135 int *irqs;
/freebsd/sys/riscv/vmm/
H A Dvmm_aplic.c107 struct aplic_irq *irqs; member
121 irq = &aplic->irqs[i]; in aplic_handle_sourcecfg()
146 irq = &aplic->irqs[i]; in aplic_set_enabled()
164 irq = &aplic->irqs[i]; in aplic_handle_target()
191 irq = &aplic->irqs[i]; in aplic_handle_idc_claimi()
381 aplic->irqs = malloc(sizeof(struct aplic_irq) * aplic->nirqs, M_APLIC, in aplic_attach_to_vm()
400 free(aplic->irqs, M_APLIC); in aplic_detach_from_vm()
422 irq = &aplic->irqs[i]; in aplic_check_pending()
455 irq = &aplic->irqs[irqid]; in aplic_inject_irq()
/freebsd/sys/contrib/dev/athk/ath11k/
H A Dahb.c146 return ab->pci.msi.irqs[vector]; in ath11k_ahb_get_msi_irq_wcn6750()
227 disable_irq_nosync(irq_grp->ab->irq_num[irq_grp->irqs[i]]); in ath11k_ahb_ext_grp_disable()
252 enable_irq(irq_grp->ab->irq_num[irq_grp->irqs[i]]); in ath11k_ahb_ext_grp_enable()
336 irq_idx = irq_grp->irqs[j]; in ath11k_ahb_sync_ext_irqs()
441 free_irq(ab->irq_num[irq_grp->irqs[j]], irq_grp); in ath11k_ahb_free_ext_irq()
541 irq_grp->irqs[num_irq++] = in ath11k_ahb_config_ext_irq()
546 irq_grp->irqs[num_irq++] = in ath11k_ahb_config_ext_irq()
551 irq_grp->irqs[num_irq++] = reo2host_exception; in ath11k_ahb_config_ext_irq()
554 irq_grp->irqs[num_irq++] = wbm2host_rx_release; in ath11k_ahb_config_ext_irq()
557 irq_grp->irqs[num_irq++] = reo2host_status; in ath11k_ahb_config_ext_irq()
[all …]
/freebsd/sys/powerpc/powerpc/
H A Dintr_machdep.c110 u_int irqs; member
122 static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */
124 static u_int nirqs = 0; /* Allocated IRQs. */
300 cnt = p->irqs + p->ipis; in powerpc_map_irq()
363 powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis, in powerpc_register_pic() argument
384 p->irqs = irqs; in powerpc_register_pic()
392 irq = p->base + irqs + ipis; in powerpc_register_pic()
425 * some adhoc maximum number of IRQs and IPIs. in powerpc_get_irq()
429 piclist[idx].irqs = 124; in powerpc_get_irq()
471 MAP_IRQ(piclist[n].node, piclist[n].irqs), in powerpc_enable_intr()
/freebsd/sys/dev/dpaa2/
H A Ddpaa2_mc.c393 int *irqs) in dpaa2_mc_alloc_msi() argument
396 return (dpaa2_mc_alloc_msi_impl(mcdev, child, count, maxcount, irqs)); in dpaa2_mc_alloc_msi()
403 dpaa2_mc_release_msi(device_t mcdev, device_t child, int count, int *irqs) in dpaa2_mc_release_msi() argument
406 return (dpaa2_mc_release_msi_impl(mcdev, child, count, irqs)); in dpaa2_mc_release_msi()
754 * Total number of IRQs is limited to 32.
758 int *irqs) in dpaa2_mc_alloc_msi_impl() argument
803 irqs[j] = sc->msi[i + j].irq; in dpaa2_mc_alloc_msi_impl()
814 * @brief Marks IRQs as free in the pre-allocated pool of MSIs.
817 * Total number of IRQs is limited to 32.
821 dpaa2_mc_release_msi_impl(device_t mcdev, device_t child, int count, int *irqs) in dpaa2_mc_release_msi_impl() argument
[all …]

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