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/linux/drivers/irqchip/
H A DMakefile4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
13 obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o
14 obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
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/linux/drivers/misc/ocxl/
H A Dafu_irq.c35 struct afu_irq *irq; in ocxl_irq_set_handler() local
39 irq = idr_find(&ctx->irq_idr, irq_id); in ocxl_irq_set_handler()
40 if (!irq) { in ocxl_irq_set_handler()
45 irq->handler = handler; in ocxl_irq_set_handler()
46 irq->private = private; in ocxl_irq_set_handler()
47 irq->free_private = free_private; in ocxl_irq_set_handler()
60 struct afu_irq *irq = data; in afu_irq_handler() local
64 if (irq->handler) in afu_irq_handler()
65 return irq->handler(irq->private); in afu_irq_handler()
70 static int setup_afu_irq(struct ocxl_context *ctx, struct afu_irq *irq) in setup_afu_irq() argument
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/linux/arch/arm64/kvm/vgic/
H A Dvgic.c7 #include <linux/irq.h>
62 * Index the VM's xarray of mapped LPIs and return a reference to the IRQ
64 * finished with the IRQ.
69 struct vgic_irq *irq = NULL; in vgic_get_lpi() local
73 irq = xa_load(&dist->lpi_xa, intid); in vgic_get_lpi()
74 if (!vgic_try_get_irq_kref(irq)) in vgic_get_lpi()
75 irq = NULL; in vgic_get_lpi()
79 return irq; in vgic_get_lpi()
85 * to call vgic_put_irq() once it's finished with this IRQ.
118 void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq) in vgic_put_irq() argument
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H A Dvgic-mmio.c9 #include <linux/irq.h>
53 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_group() local
55 if (irq->group) in vgic_mmio_read_group()
58 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_read_group()
64 static void vgic_update_vsgi(struct vgic_irq *irq) in vgic_update_vsgi() argument
66 WARN_ON(its_prop_update_vsgi(irq->host_irq, irq->priority, irq->group)); in vgic_update_vsgi()
77 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_group() local
79 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_group()
80 irq->group = !!(val & BIT(i)); in vgic_mmio_write_group()
81 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_group()
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H A Dvgic-v4.c8 #include <linux/irq.h>
29 * (ITS instance, device, event and irq) using a process that is
33 * identified by the routing entry) and the host irq, using the GICv4
70 * irq corresponding to the vcpu, then call its_make_vpe_resident().
84 static irqreturn_t vgic_v4_doorbell_handler(int irq, void *info) in vgic_v4_doorbell_handler() argument
90 !irqd_irq_disabled(&irq_to_desc(irq)->irq_data)) in vgic_v4_doorbell_handler()
91 disable_irq_nosync(irq); in vgic_v4_doorbell_handler()
108 static void vgic_v4_sync_sgi_config(struct its_vpe *vpe, struct vgic_irq *irq) in vgic_v4_sync_sgi_config() argument
110 vpe->sgi_config[irq->intid].enabled = irq->enabled; in vgic_v4_sync_sgi_config()
111 vpe->sgi_config[irq->intid].group = irq->group; in vgic_v4_sync_sgi_config()
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/linux/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
H A Dirq_public.h22 /*! Write to a control register of IRQ[ID]
24 \param ID[in] IRQ identifier
28 \return none, IRQ[ID].ctrl[reg] = value
35 /*! Read from a control register of IRQ[ID]
37 \param ID[in] IRQ identifier
41 \return IRQ[ID].ctrl[reg]
47 /*! Enable an IRQ channel of IRQ[ID] with a mode
49 \param ID[in] IRQ (device) identifier
50 \param irq[in] IRQ (channel) identifier
52 \return none, enable(IRQ[ID].channel[irq_ID])
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/linux/drivers/acpi/
H A Dpci_link.c10 * 1. Support more than one IRQ resource entry per link device (index).
12 * for IRQ management (e.g. start()->_SRS).
28 #include <linux/irq.h>
53 * later even the link is disable. Instead, we just repick the active irq
56 u32 active; /* Current IRQ */
69 struct acpi_pci_link_irq irq; member
97 struct acpi_resource_irq *p = &resource->data.irq; in acpi_pci_link_check_possible()
100 "Blank _PRS IRQ resource\n"); in acpi_pci_link_check_possible()
108 "Invalid _PRS IRQ %d\n", in acpi_pci_link_check_possible()
112 link->irq.possible[i] = p->interrupts[i]; in acpi_pci_link_check_possible()
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H A Dirq.c3 * ACPI GSI IRQ layer
9 #include <linux/irq.h>
19 * acpi_gsi_to_irq() - Retrieve the linux irq number for a given GSI
20 * @gsi: GSI IRQ number to map
21 * @irq: pointer where linux IRQ number is stored
23 * irq location updated with irq value [>0 on success, 0 on failure]
28 int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) in acpi_gsi_to_irq() argument
34 *irq = irq_find_mapping(d, gsi); in acpi_gsi_to_irq()
36 * *irq == 0 means no mapping, that should be reported as a in acpi_gsi_to_irq()
39 if (!*irq && acpi_gsi_to_irq_fallback) in acpi_gsi_to_irq()
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/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dpci_irq.c145 /* mlx5_system_free_irq - Free an IRQ
146 * @irq: IRQ to free
148 * Free the IRQ and other resources such as rmap from the system.
154 static void mlx5_system_free_irq(struct mlx5_irq *irq) in mlx5_system_free_irq() argument
156 struct mlx5_irq_pool *pool = irq->pool; in mlx5_system_free_irq()
165 irq_update_affinity_hint(irq->map.virq, NULL); in mlx5_system_free_irq()
169 irq_cpu_rmap_remove(rmap, irq->map.virq); in mlx5_system_free_irq()
172 free_irq(irq->map.virq, &irq->nh); in mlx5_system_free_irq()
173 if (irq->map.index && pci_msix_can_alloc_dyn(pool->dev->pdev)) in mlx5_system_free_irq()
174 pci_msix_free_irq(pool->dev->pdev, irq->map); in mlx5_system_free_irq()
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/linux/arch/x86/include/asm/trace/
H A Dirq_vectors.h61 * irq_work - called when entering/exiting a irq work interrupt
128 TP_PROTO(unsigned int irq, unsigned int vector,
131 TP_ARGS(irq, vector, cpu, apicdest),
134 __field( unsigned int, irq )
141 __entry->irq = irq;
147 TP_printk("irq=%u vector=%u cpu=%u apicdest=0x%08x",
148 __entry->irq, __entry->vector, __entry->cpu,
154 TP_PROTO(unsigned int irq, unsigned int vector,
158 TP_ARGS(irq, vector, cpu, prev_vector, prev_cpu),
161 __field( unsigned int, irq )
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/linux/drivers/misc/
H A Ddummy-irq.c3 * Dummy IRQ handler driver.
6 * by the 'irq' parameter.
9 * which spurious IRQs would happen on disabled IRQ vector.
15 #include <linux/irq.h>
18 static int irq = -1; variable
20 static irqreturn_t dummy_interrupt(int irq, void *dev_id) in dummy_interrupt() argument
25 printk(KERN_INFO "dummy-irq: interrupt occurred on IRQ %d\n", in dummy_interrupt()
26 irq); in dummy_interrupt()
35 if (irq < 0) { in dummy_irq_init()
36 printk(KERN_ERR "dummy-irq: no IRQ given. Use irq=N\n"); in dummy_irq_init()
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/linux/drivers/parisc/
H A Dgsc.c35 int irq = txn_alloc_irq(GSC_EIM_WIDTH); in gsc_alloc_irq() local
36 if (irq < 0) { in gsc_alloc_irq()
37 printk("cannot get irq\n"); in gsc_alloc_irq()
38 return irq; in gsc_alloc_irq()
41 i->txn_addr = txn_alloc_addr(irq); in gsc_alloc_irq()
42 i->txn_data = txn_alloc_data(irq); in gsc_alloc_irq()
43 i->irq = irq; in gsc_alloc_irq()
45 return irq; in gsc_alloc_irq()
48 int gsc_claim_irq(struct gsc_irq *i, int irq) in gsc_claim_irq() argument
50 int c = irq; in gsc_claim_irq()
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/linux/arch/m68k/coldfire/
H A Dintc-simr.c17 #include <linux/irq.h>
38 static inline unsigned int irq2ebit(unsigned int irq) in irq2ebit() argument
40 return irqebitmap[irq - EINT0]; in irq2ebit()
54 static inline unsigned int irq2ebit(unsigned int irq) in irq2ebit() argument
56 return irq - EINT0; in irq2ebit()
69 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_mask() local
71 if (MCFINTC2_SIMR && (irq > 127)) in intc_irq_mask()
72 __raw_writeb(irq - 128, MCFINTC2_SIMR); in intc_irq_mask()
73 else if (MCFINTC1_SIMR && (irq > 63)) in intc_irq_mask()
74 __raw_writeb(irq - 64, MCFINTC1_SIMR); in intc_irq_mask()
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H A Dintc-2.c24 #include <linux/irq.h>
52 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_mask() local
57 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_mask()
61 imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL; in intc_irq_mask()
62 imrbit = 0x1 << (irq & 0x1f); in intc_irq_mask()
70 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_unmask() local
75 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_unmask()
79 imraddr += ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL); in intc_irq_unmask()
80 imrbit = 0x1 << (irq & 0x1f); in intc_irq_unmask()
83 if ((irq & 0x20) == 0) in intc_irq_unmask()
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H A Dintc-5272.c16 #include <linux/irq.h>
78 * an interrupt on this irq (for the external irqs). So this mask function
83 unsigned int irq = d->irq; in intc_irq_mask() local
85 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { in intc_irq_mask()
87 irq -= MCFINT_VECBASE; in intc_irq_mask()
88 v = 0x8 << intc_irqmap[irq].index; in intc_irq_mask()
89 writel(v, intc_irqmap[irq].icr); in intc_irq_mask()
95 unsigned int irq = d->irq; in intc_irq_unmask() local
97 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { in intc_irq_unmask()
99 irq -= MCFINT_VECBASE; in intc_irq_unmask()
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/linux/arch/m68k/virt/
H A Dints.c5 #include <linux/irq.h>
13 #include <asm/irq.h>
34 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
35 * CPU IRQ #1 -> PIC #1
36 * IRQ #1 to IRQ #31 -> unused
37 * IRQ #32 -> goldfish-tty
38 * CPU IRQ #2 -> PIC #2
39 * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
40 * CPU IRQ #3 -> PIC #3
41 * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
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/linux/Documentation/arch/arm/
H A Dinterrupts.rst16 Secondly, the IRQ subsystem.
39 SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely.
48 We also bring the idea of an IRQ "chip" (mainly to reduce the size of
57 * Acknowledge the IRQ.
58 * If this is a level-based IRQ, then it is expected to mask the IRQ
61 void (*ack)(unsigned int irq);
63 * Mask the IRQ in hardware.
65 void (*mask)(unsigned int irq);
67 * Unmask the IRQ in hardware.
69 void (*unmask)(unsigned int irq);
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/linux/drivers/gpu/drm/i915/gvt/
H A Dinterrupt.c64 #define get_event_virt_handler(irq, e) (irq->events[e].v_handler) argument
65 #define get_irq_info(irq, e) (irq->events[e].info) argument
67 #define irq_to_gvt(irq) \ argument
68 container_of(irq, struct intel_gvt, irq)
169 struct intel_gvt_irq *irq = &gvt->irq; in regbase_to_irq_info() local
172 for_each_set_bit(i, irq->irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX) { in regbase_to_irq_info()
173 if (i915_mmio_reg_offset(irq->info[i]->reg_base) == reg) in regbase_to_irq_info()
174 return irq->info[i]; in regbase_to_irq_info()
198 const struct intel_gvt_irq_ops *ops = gvt->irq.ops; in intel_vgpu_reg_imr_handler()
212 * intel_vgpu_reg_master_irq_handler - master IRQ write emulation handler
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_irq.c33 * passed to amdgpu IRQ handler which is responsible for detecting source and
41 * For GPU interrupt sources that may be driven by another driver, IRQ domain
45 #include <linux/irq.h>
130 spin_lock_irqsave(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
132 if (!adev->irq.client[i].sources) in amdgpu_irq_disable_all()
136 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_disable_all()
150 spin_unlock_irqrestore(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
154 * amdgpu_irq_handler - IRQ handler
156 * @irq: IRQ number (unused)
159 * IRQ handler for amdgpu driver (all ASICs).
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/linux/include/linux/
H A Dinterrupt.h21 #include <asm/irq.h>
42 * irq handling routines.
44 * IRQF_SHARED - allow sharing the irq among several devices
48 * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing
54 * irq line disabled until the threaded handler has been run.
55 * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee
60 * IRQF_EARLY_RESUME - Resume IRQ early during syscore instead of at device
62 * IRQF_COND_SUSPEND - If the IRQ is shared with a NO_SUSPEND user, execute this
66 * IRQF_NO_AUTOEN - Don't enable IRQ or NMI automatically when users request it.
113 * @irq: interrupt number
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H A Dirqnr.h9 extern struct irq_desc *irq_to_desc(unsigned int irq);
12 # define for_each_irq_desc(irq, desc) \ argument
13 for (irq = 0, desc = irq_to_desc(irq); irq < nr_irqs; \
14 irq++, desc = irq_to_desc(irq)) \
20 # define for_each_irq_desc_reverse(irq, desc) \ argument
21 for (irq = nr_irqs - 1, desc = irq_to_desc(irq); irq >= 0; \
22 irq--, desc = irq_to_desc(irq)) \
27 # define for_each_active_irq(irq) \ argument
28 for (irq = irq_get_next_irq(0); irq < nr_irqs; \
29 irq = irq_get_next_irq(irq + 1))
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/linux/arch/powerpc/platforms/44x/
H A Dhsta_msi.c42 int irq, hwirq; in hsta_setup_msi_irqs() local
52 irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1); in hsta_setup_msi_irqs()
53 if (irq < 0) { in hsta_setup_msi_irqs()
56 return irq; in hsta_setup_msi_irqs()
59 hwirq = ppc4xx_hsta_msi.irq_map[irq]; in hsta_setup_msi_irqs()
61 pr_err("%s: Failed mapping irq %d\n", __func__, irq); in hsta_setup_msi_irqs()
69 addr = ppc4xx_hsta_msi.address + irq*0x10; in hsta_setup_msi_irqs()
76 pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq, in hsta_setup_msi_irqs()
83 msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1); in hsta_setup_msi_irqs()
94 int irq; in hsta_find_hwirq_offset() local
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/linux/kernel/irq/
H A Dmanage.c6 * This file contains driver APIs to the irq subsystem.
11 #include <linux/irq.h>
77 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
78 * @irq: interrupt number to wait for
80 * This function waits for any pending hard IRQ handlers for this
82 * function while holding a resource the IRQ handler may need you
91 * This function may be called - with care - from IRQ context.
98 bool synchronize_hardirq(unsigned int irq) in synchronize_hardirq() argument
100 struct irq_desc *desc = irq_to_desc(irq); in synchronize_hardirq()
122 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
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H A Dirqdesc.c10 #include <linux/irq.h>
114 static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node, in desc_set_defaults() argument
123 desc->irq_data.irq = irq; in desc_set_defaults()
171 static void irq_insert_desc(unsigned int irq, struct irq_desc *desc) in irq_insert_desc() argument
173 MA_STATE(mas, &sparse_irqs, irq, irq); in irq_insert_desc()
177 static void delete_irq_desc(unsigned int irq) in delete_irq_desc() argument
179 MA_STATE(mas, &sparse_irqs, irq, irq); in delete_irq_desc()
187 static int init_desc(struct irq_desc *desc, int irq, int node, in init_desc() argument
205 desc_set_defaults(irq, desc, node, affinity, owner); in init_desc()
358 ATTRIBUTE_GROUPS(irq);
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/linux/arch/x86/kvm/
H A Dirq_comm.c20 #include "irq.h"
48 struct kvm_lapic_irq *irq, struct dest_map *dest_map) in kvm_irq_delivery_to_apic() argument
55 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map)) in kvm_irq_delivery_to_apic()
58 if (irq->dest_mode == APIC_DEST_PHYSICAL && in kvm_irq_delivery_to_apic()
59 irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) { in kvm_irq_delivery_to_apic()
61 irq->delivery_mode = APIC_DM_FIXED; in kvm_irq_delivery_to_apic()
70 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, in kvm_irq_delivery_to_apic()
71 irq->dest_id, irq->dest_mode)) in kvm_irq_delivery_to_apic()
74 if (!kvm_lowest_prio_delivery(irq)) { in kvm_irq_delivery_to_apic()
77 r += kvm_apic_set_irq(vcpu, irq, dest_map); in kvm_irq_delivery_to_apic()
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