| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pci
[all...] |
| H A D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
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| H A D | snps,dw-pcie.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Root Port controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie
23 - compatible
[all …]
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| H A D | baikal,bt1-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Baikal-T1 PCIe Root Port Controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 Embedded into Baikal-T1 SoC Root Complex controller with a single port
14 activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured
18 performed by software. There four in- and four outbound iATU regions
22 - $ref: /schemas/pci/snps,dw-pcie.yaml#
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | ti,keystone-irq.txt | 1 Keystone 2 IRQ controller IP
4 host using the IRQ controller IP. It provides 28 IRQ signals to ARM.
5 The IRQ handler running on HOST OS can identify DSP signal source by
10 - compatible: should be "ti,keystone-irq"
11 - ti,syscon-dev : phandle and offset pair. The phandle to syscon used to
14 - interrupt-controller : Identifies the node as an interrupt controller
15 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
17 - interrupts: interrupt reference to primary interrupt controller
24 compatible = "ti,keystone-irq";
25 ti,syscon-dev = <&devctrl 0x2a0>;
[all …]
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| H A D | ti,omap-intc-irq.txt | 4 96 or 128 IRQ signals to the ARM host depending on the SoC.
7 - compatible: should be one of
8 "ti,omap2-intc"
9 "ti,omap3-intc"
10 "ti,dm814-intc"
11 "ti,dm816-intc"
12 "ti,am33xx-intc"
14 - interrupt-controller : Identifies the node as an interrupt controller
15 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
17 - interrupts: interrupt reference to primary interrupt controller
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | microchip,sparx5-sgpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars Povlsen <lars.povlsen@microchip.com>
16 connect control signals from SFP modules and to act as an LED
21 pattern: "^gpio@[0-9a-f]+$"
25 - microchip,sparx5-sgpio
26 - mscc,ocelot-sgpio
27 - mscc,luton-sgpio
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | gpio-dsp-keystone.txt | 4 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
8 - 8 for C66x CorePacx CPUs 0-7
11 - each GPIO can be configured only as output pin;
12 - setting GPIO value to 1 causes IRQ generation on target DSP core;
13 - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
17 - compatible: should be "ti,keystone-dsp-gpio"
18 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
21 - gpio-controller: Marks the device node as a gpio controller.
22 - #gpio-cells: Should be 2.
29 compatible = "ti,keystone-dsp-gpio";
[all …]
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| H A D | nvidia,tegra186-gpio.txt | 10 read/write the value of, numerous GPIO signals. Routing of GPIO signals to
24 b) GPIO registers, which allow manipulation of the GPIO signals. In some GPIO
42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h>
43 describes the port-level mapping. In that file, the naming convention for ports
48 Each GPIO controller can generate a number of interrupt signals. Each signal
50 number of interrupt signals generated by a controller varies as a rough function
52 both the overall controller HW module and the sets-of-ports as "controllers".
54 Each GPIO controller in fact generates multiple interrupts signals for each set
56 interrupt signals generated by a set-of-ports. The intent is for each generated
59 per-port-set signals is reported via a separate register. Thus, a driver needs
[all …]
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| H A D | nvidia,tegra186-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 and read/write the value of, numerous GPIO signals. Routing of GPIO signals
35 b) GPIO registers, which allow manipulation of the GPIO signals. In some
53 controller, are both extremely non-linear. The header file
54 <dt-bindings/gpio/tegra186-gpio.h> describes the port-level mapping. In
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | goodix,gt7375p.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | snps,dw-umctl2-ddrc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Michal Simek <michal.simek@amd.com>
17 16-bits or 32-bits or 64-bits wide.
20 controller. It has an optional SEC/DEC ECC support in 64- and 32-bits
26 - deprecated: true
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-bmc-tyan-s8036.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
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| H A D | aspeed-bmc-tyan-s7106.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/iio/accel/ |
| H A D | adi,adxl367.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices ADXL367 3-Axis Digital Accelerometer
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The ADXL367 is an ultralow power, 3-axis MEMS accelerometer.
15 The ADXL367 does not alias input signals by to achieve ultralow power
17 data rates. Measurement ranges of +-2g, +-4g, and +-8g are available,
18 with a resolution of 0.25mg/LSB on the +-2 g range.
22 It includes a deep multimode output FIFO, a built-in micropower
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx7d-flex-concentrator.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "imx7d-tqma7.dtsi"
14 /delete-node/ &ds1339;
18 compatible = "kam,imx7d-flex-concentrator", "fsl,imx7d";
22 /* 1024 MB - TQMa7D board configuration */
26 reg_usb_otg2_vbus: regulator-us
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | bfticu.txt | 4 Its main functionality is to collect IRQs from the whole chassis and signals
8 - compatible: "keymile,bfticu"
9 - interrupt-controller: the bfticu FPGA is an interrupt controller
10 - interrupts: the main IRQ line to signal the collected IRQs
11 - #interrupt-cells : is 2 and their usage is compliant to the 2 cells variant
12 of Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
13 - reg: access on the parent local bus (chip select, offset in chip select, size)
17 chassis-mgmt@3,0 {
19 interrupt-controller;
20 #interrupt-cells = <2>;
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | microchip,sam9x75-lvds.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dharma Balasubiramani <dharma.b@microchip.com>
15 LVDS output signals. LVDSC functions include bit mapping, balanced mode
20 const: microchip,sam9x75-lvds
30 - description: Peripheral Bus Clock
32 clock-names:
34 - const: pclk
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/iio/gyroscope/ |
| H A D | invensense,mpu3050.txt | 1 Invensense MPU-3050 Gyroscope device tree bindings
4 - compatible : should be "invensense,mpu3050"
5 - reg : the I2C address of the sensor
8 - interrupts : interrupt mapping for the trigger interrupt from the
9 internal oscillator. The following IRQ modes are supported:
13 - vdd-supply : supply regulator for the main power voltage.
14 - vlogic-supply : supply regulator for the signal voltage.
15 - mount-matrix : see iio/mount-matrix.txt
18 - The MPU-3050 will pass through and forward the I2C signals from the
21 i2c gate node. For details see: i2c/i2c-gate.txt
[all …]
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| H A D | invensense,mpu3050.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Invensense MPU-3050 Gyroscope
10 - Linus Walleij <linus.walleij@linaro.org>
19 vdd-supply: true
21 vlogic-supply: true
28 mount-matrix: true
30 i2c-gate:
31 $ref: /schemas/i2c/i2c-controller.yaml
[all …]
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| /freebsd/sys/arm/arm/ |
| H A D | exception.S | 3 /*-
4 * Copyright (c) 1994-1997 Mark Brinicombe.
77 * PUSHFRAME - macro to push a trap frame on the stack in the current mode
82 str lr, [sp, #-4]!; /* Push the return address */ \
84 stmia sp, {r0-r12}; /* Push the user mode registers */ \
86 stmia r0, {r13-r14}^; /* Push the user mode registers */ \
89 str r0, [sp, #-4]!;
92 * PULLFRAME - macro to pull a trap frame from the stack in the current mode
100 ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
107 * PUSHFRAMEINSVC - macro to push a trap frame on the stack in SVC32 mode
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | amlogic,meson-ir-tx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/amlogic,meson-ir-tx.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Viktor Prutyanov <viktor.prutyanov@phystech.edu>
16 sending IR signals with arbitrary carrier frequency and duty cycle.
21 - const: amlogic,meson-ir-tx
22 - items:
23 - const: amlogic,meson-g12a-ir-tx
24 - const: amlogic,meson-ir-tx
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/net/can/ |
| H A D | microchip,mcp251xfd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip MCP2517FD, MCP2518FD and MCP251863 stand-alone CAN controller
10 - Marc Kleine-Budde <mkl@pengutronix.de>
13 - $ref: can-controller.yaml#
18 - enum:
19 - microchip,mcp2517fd
20 - microchip,mcp2518fd
21 - microchip,mcp251xfd
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | samsung,s6d27a1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Markuss Broks <markuss.broks@gmail.com>
16 - $ref: panel-common.yaml#
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
28 interrupt that signals abnormalities in the display hardware.
33 reset-gpios: true
35 vci-supply:
39 vccio-supply:
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| H A D | samsung,lms380kf01.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Linus Walleij <linus.walleij@linaro.org>
17 - $ref: panel-common.yaml#
18 - $ref: /schemas/spi/spi-peripheral-props.yaml#
29 interrupt that signals abnormalities in the display hardware.
34 reset-gpios: true
36 vci-supply:
40 vccio-supply:
[all …]
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