1*c66ec88fSEmmanuel VadotOmap2/3 intc controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotOn TI omap2 and 3 the intc interrupt controller can provide 4*c66ec88fSEmmanuel Vadot96 or 128 IRQ signals to the ARM host depending on the SoC. 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel VadotRequired Properties: 7*c66ec88fSEmmanuel Vadot- compatible: should be one of 8*c66ec88fSEmmanuel Vadot "ti,omap2-intc" 9*c66ec88fSEmmanuel Vadot "ti,omap3-intc" 10*c66ec88fSEmmanuel Vadot "ti,dm814-intc" 11*c66ec88fSEmmanuel Vadot "ti,dm816-intc" 12*c66ec88fSEmmanuel Vadot "ti,am33xx-intc" 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot- interrupt-controller : Identifies the node as an interrupt controller 15*c66ec88fSEmmanuel Vadot- #interrupt-cells : Specifies the number of cells needed to encode interrupt 16*c66ec88fSEmmanuel Vadot source, should be 1 for intc 17*c66ec88fSEmmanuel Vadot- interrupts: interrupt reference to primary interrupt controller 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel VadotPlease refer to interrupts.txt in this directory for details of the common 20*c66ec88fSEmmanuel VadotInterrupt Controllers bindings used by client devices. 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel VadotExample: 23*c66ec88fSEmmanuel Vadot intc: interrupt-controller@48200000 { 24*c66ec88fSEmmanuel Vadot compatible = "ti,omap3-intc"; 25*c66ec88fSEmmanuel Vadot interrupt-controller; 26*c66ec88fSEmmanuel Vadot #interrupt-cells = <1>; 27*c66ec88fSEmmanuel Vadot reg = <0x48200000 0x1000>; 28*c66ec88fSEmmanuel Vadot }; 29